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-rw-r--r--include/configs/AR405.h1
-rw-r--r--include/configs/CPCIISER4.h1
-rw-r--r--include/configs/CRAYL1.h1
-rw-r--r--include/configs/ERIC.h1
-rw-r--r--include/configs/EXBITGEN.h1
-rw-r--r--include/configs/HUB405.h1
-rw-r--r--include/configs/JSE.h1
-rw-r--r--include/configs/MIP405.h1
-rw-r--r--include/configs/OCRTC.h1
-rw-r--r--include/configs/ORSG.h1
-rw-r--r--include/configs/PIP405.h1
-rw-r--r--include/configs/W7OLMC.h1
-rw-r--r--include/configs/W7OLMG.h1
-rw-r--r--include/configs/WUH405.h1
-rw-r--r--include/configs/csb272.h1
-rw-r--r--include/configs/csb472.h1
-rw-r--r--include/configs/netstal-common.h2
-rw-r--r--include/configs/sbc405.h1
18 files changed, 18 insertions, 1 deletions
diff --git a/include/configs/AR405.h b/include/configs/AR405.h
index 9f1926957..73e34bdab 100644
--- a/include/configs/AR405.h
+++ b/include/configs/AR405.h
@@ -71,6 +71,7 @@
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 0 /* PHY address */
#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
+#define CONFIG_NET_MULTI
/*
diff --git a/include/configs/CPCIISER4.h b/include/configs/CPCIISER4.h
index 326371253..b2679e587 100644
--- a/include/configs/CPCIISER4.h
+++ b/include/configs/CPCIISER4.h
@@ -54,6 +54,7 @@
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 0 /* PHY address */
#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
+#define CONFIG_NET_MULTI
/*
diff --git a/include/configs/CRAYL1.h b/include/configs/CRAYL1.h
index 150bd29e0..96bf161aa 100644
--- a/include/configs/CRAYL1.h
+++ b/include/configs/CRAYL1.h
@@ -45,6 +45,7 @@
#define CONFIG_PHY_ADDR 1 /* PHY address; handling of ENET */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* early setup for 405gp */
#define CONFIG_MISC_INIT_R 1 /* so that a misc_init_r() is called */
+#define CONFIG_NET_MULTI
/* set PRAM to keep U-Boot out, mem= to keep linux out, and initrd_hi to
* keep possible initrd ramdisk decompression out. This is in k (1024 bytes)
diff --git a/include/configs/ERIC.h b/include/configs/ERIC.h
index 201e62aa0..023f33e1e 100644
--- a/include/configs/ERIC.h
+++ b/include/configs/ERIC.h
@@ -96,6 +96,7 @@
#define CONFIG_PPC4xx_EMAC
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 1 /* PHY address */
+#define CONFIG_NET_MULTI
/*
diff --git a/include/configs/EXBITGEN.h b/include/configs/EXBITGEN.h
index 4729464f2..4d0824339 100644
--- a/include/configs/EXBITGEN.h
+++ b/include/configs/EXBITGEN.h
@@ -81,6 +81,7 @@
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 0 /* PHY address */
+#define CONFIG_NET_MULTI
/*
diff --git a/include/configs/HUB405.h b/include/configs/HUB405.h
index 0e7d2c010..ea502d42c 100644
--- a/include/configs/HUB405.h
+++ b/include/configs/HUB405.h
@@ -60,6 +60,7 @@
#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
#define CONFIG_PHY_CLK_FREQ EMAC_STACR_CLK_66MHZ /* 66 MHz OPB clock*/
+#define CONFIG_NET_MULTI
/*
diff --git a/include/configs/JSE.h b/include/configs/JSE.h
index 8aca1f941..80c70e488 100644
--- a/include/configs/JSE.h
+++ b/include/configs/JSE.h
@@ -135,6 +135,7 @@
#define CONFIG_PPC4xx_EMAC
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 1 /* PHY address */
+#define CONFIG_NET_MULTI
/*
diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h
index a3869c874..8315cfe62 100644
--- a/include/configs/MIP405.h
+++ b/include/configs/MIP405.h
@@ -341,6 +341,7 @@
#define CONFIG_PHY_ADDR 1 /* PHY address */
#define CONFIG_PHY_RESET_DELAY 300 /* Intel LXT971A needs this */
#define CONFIG_PHY_CMD_DELAY 40 /* Intel LXT971A needs this */
+#define CONFIG_NET_MULTI
/************************************************************
* RTC
***********************************************************/
diff --git a/include/configs/OCRTC.h b/include/configs/OCRTC.h
index 2591f1ded..860ec5292 100644
--- a/include/configs/OCRTC.h
+++ b/include/configs/OCRTC.h
@@ -54,6 +54,7 @@
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 0 /* PHY address */
#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
+#define CONFIG_NET_MULTI
/*
diff --git a/include/configs/ORSG.h b/include/configs/ORSG.h
index 13d6e0496..b2e2d41f2 100644
--- a/include/configs/ORSG.h
+++ b/include/configs/ORSG.h
@@ -54,6 +54,7 @@
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 0 /* PHY address */
#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
+#define CONFIG_NET_MULTI
/*
diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h
index 5c4d69b20..e214d70a5 100644
--- a/include/configs/PIP405.h
+++ b/include/configs/PIP405.h
@@ -281,6 +281,7 @@
#define CONFIG_PPC4xx_EMAC
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 1 /* PHY address */
+#define CONFIG_NET_MULTI
/************************************************************
* RTC
***********************************************************/
diff --git a/include/configs/W7OLMC.h b/include/configs/W7OLMC.h
index ceef76eea..553845d6d 100644
--- a/include/configs/W7OLMC.h
+++ b/include/configs/W7OLMC.h
@@ -68,6 +68,7 @@
#define CONFIG_PPC4xx_EMAC
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 0 /* PHY address */
+#define CONFIG_NET_MULTI
#define CONFIG_RTC_M48T35A 1 /* ST Electronics M48 timekeeper */
diff --git a/include/configs/W7OLMG.h b/include/configs/W7OLMG.h
index 11e063010..73d6d24b6 100644
--- a/include/configs/W7OLMG.h
+++ b/include/configs/W7OLMG.h
@@ -68,6 +68,7 @@
#define CONFIG_PPC4xx_EMAC
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 0 /* PHY address */
+#define CONFIG_NET_MULTI
#define CONFIG_RTC_M48T35A 1 /* ST Electronics M48 timekeeper */
#define CONFIG_DTT_LM75 1 /* ON Semi's LM75 */
diff --git a/include/configs/WUH405.h b/include/configs/WUH405.h
index 99188bc34..5c281a1a6 100644
--- a/include/configs/WUH405.h
+++ b/include/configs/WUH405.h
@@ -58,6 +58,7 @@
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 0 /* PHY address */
#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
+#define CONFIG_NET_MULTI
#define CONFIG_PHY_CLK_FREQ EMAC_STACR_CLK_66MHZ /* 66 MHz OPB clock*/
diff --git a/include/configs/csb272.h b/include/configs/csb272.h
index 204aea0e8..aed6f50f9 100644
--- a/include/configs/csb272.h
+++ b/include/configs/csb272.h
@@ -184,6 +184,7 @@
#define CONFIG_PHY_CMD_DELAY 40 /* PHY COMMAND delay */
/* 32usec min. for LXT971A */
#define CONFIG_PHY_RESET_DELAY 300 /* PHY RESET recovery delay */
+#define CONFIG_NET_MULTI
/*
* RTC configuration
diff --git a/include/configs/csb472.h b/include/configs/csb472.h
index 9b3a11c1a..24b961f3e 100644
--- a/include/configs/csb472.h
+++ b/include/configs/csb472.h
@@ -183,6 +183,7 @@
#define CONFIG_PHY_CMD_DELAY 40 /* PHY COMMAND delay */
/* 32usec min. for LXT971A */
#define CONFIG_PHY_RESET_DELAY 300 /* PHY RESET recovery delay */
+#define CONFIG_NET_MULTI
/*
* RTC configuration
diff --git a/include/configs/netstal-common.h b/include/configs/netstal-common.h
index 4d5c1ab34..4bed7ae26 100644
--- a/include/configs/netstal-common.h
+++ b/include/configs/netstal-common.h
@@ -61,8 +61,8 @@
#define CONFIG_PPC4xx_EMAC
#define CONFIG_MII /* MII PHY management */
#define CONFIG_PHY_ADDR 1 /* PHY address */
-#if defined(CONFIG_440)
#define CONFIG_NET_MULTI 1
+#if defined(CONFIG_440)
#define CONFIG_NETCONSOLE /* include NetConsole support */
#define CONFIG_SYS_RX_ETH_BUFFER 32 /* number of eth rx buffers */
#else
diff --git a/include/configs/sbc405.h b/include/configs/sbc405.h
index 7197aaf79..242f42fdc 100644
--- a/include/configs/sbc405.h
+++ b/include/configs/sbc405.h
@@ -62,6 +62,7 @@
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 0 /* PHY address */
#define CONFIG_PHY_RESET_DELAY 300 /* Intel LXT971A needs this */
+#define CONFIG_NET_MULTI
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootargs=emac(0,0)host:/T221ppc/target/config/sbc405/vxWorks.st " \
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-11 13:14:25 +0000