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2008-12-17Merge branch 'fixes' into cleanupsHaavard Skinnemoen
Conflicts: board/atmel/atngw100/atngw100.c board/atmel/atstk1000/atstk1000.c cpu/at32ap/at32ap700x/gpio.c include/asm-avr32/arch-at32ap700x/clk.h include/configs/atngw100.h include/configs/atstk1002.h include/configs/atstk1003.h include/configs/atstk1004.h include/configs/atstk1006.h include/configs/favr-32-ezkit.h include/configs/hammerhead.h include/configs/mimc200.h
2008-10-18rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-01avr32: Add gclk helper functionsHaavard Skinnemoen
Add two helper functions for configuring and enabling generic clocks: - gclk_enable_output: Enables output on a GCLKx pin - gclk_set_rate: Configures a gclk to run at a specific rate This should eliminate any reason to go mucking about with PM registers from board code. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-09-01avr32: refactor the portmux/gpio codeHaavard Skinnemoen
- Separate the portmux configuration functionality from the GPIO pin control API. - Separate the controller-specific code from the chip-specific code. - Allow "ganged" port configuration (multiple pins at once). - Add more flexibility to the "canned" peripheral select functions: - Allow using more than 23 address bits, more chip selects, as well as NAND- and CF-specific pins. - Make the MACB SPEED pin optional, and choose between MII/RMII using a parameter instead of an #ifdef. - Make it possible to use other MMC slots than slot 0, and support different MMC/SDCard data bus widths. - Use more reasonable pull-up defaults; floating pins may consume a lot of power. - Get rid of some custom portmux code from the mimc200 board code. The old gpio/portmux API couldn't really handle its requirements, but the new one can. - Add documentation. The end result is slightly smaller code for all boards. Which isn't really the point, but at least it isn't any larger. This has been verified on ATSTK1002 and ATNGW100. I'd appreciate if the board maintainers could help me test this on their boards. In particular, the mimc200 port has lost a lot of code, so I'm hoping Mark can help me out. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Cc: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Cc: Mark Jackson <mpfj@mimc.co.uk> Cc: Alex Raimondi <alex.raimondi@miromico.ch> Cc: Julien May <julien.may@miromico.ch> Changes since v1: * Enable pullup on NWAIT * Add missing include to portmux-pio.h * Rename CONFIG_PIO2 -> CONFIG_PORTMUX_PIO to match docs
2008-07-30Add support for the hammerhead (AVR32) boardJulien May
The Hammerhead platform is built around a AVR32 32-bit microcontroller from Atmel. It offers versatile peripherals, such as ethernet, usb device, usb host etc. The board also incooperates a power supply and is a Power over Ethernet (PoE) Powered Device (PD). Additonally, a Cyclone III FPGA from Altera is integrated on the board. The FPGA is mapped into the 32-bit AVR memory bus. The FPGA offers two DDR2 SDRAM interfaces, which will cover even the most exceptional need of memory bandwidth. Together with the onboard video decoder the board is ready for video processing. For more information see: http:///www.miromico.com/hammerhead Signed-off-by: Julien May <mailinglist@miromico.ch> [haavard.skinnemoen@atmel.com: various small fixes and adaptions] Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-06-20avr32: Fix SPI portmux initializationHaavard Skinnemoen
Use the new GPIO manipulation functions to set up the chip select lines, and make sure both busses use GPIO for chip select control. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-06-03atmel_spi: Driver for the Atmel SPI controllerHans-Christian Egtvedt
This adds a driver for the SPI controller found on most AT91 and AVR32 chips, implementing the new SPI API. Changed in v4: - Update to new API - Handle zero-length transfers appropriately. The user may send a zero-length SPI transfer with SPI_XFER_END set in order to deactivate the chip select after a series of transfers with chip select active. This is useful e.g. when polling the status register of DataFlash. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2008-05-27avr32: Rename pm_init() as clk_init() and make SoC-specificHaavard Skinnemoen
pm_init() was always more about clock initialization than anything else. Dealing with PLLs, clock gating and such is also inherently SoC-specific, so move it into a SoC-specific directory. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2007-12-17AVR32: Fix wrong pin setup for USART3Haavard Skinnemoen
As reported by Gerhard Berghofer: in "gpio_enable_usart3" the correct pins for USART 3 are PB17 and PB18 instead of PB18 and PB19. which is obviously correct. There's currently no code that uses USART3, but custom boards may run into problems. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-12-17AVR32: Make some AT32AP700x peripherals optionalHaavard Skinnemoen
Add a chip-features file providing definitions of the form AT32AP700x_CHIP_HAS_<peripheral> to indicate the availability of the given peripheral on the currently selected chip. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-12-17AVR32: Rename at32ap7000 -> at32ap700xHaavard Skinnemoen
The SoC-specific code for all the AT32AP700x CPUs is practically identical; the only difference is that some chips have less features than others. By doing this rename, we can add support for the AP7000 derivatives simply by making some features conditional. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>