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2008-02-12QE: Move FDT support into a common fileKumar Gala
Move the flat device tree setup for QE related devices into a common file shared between 83xx & 85xx platforms that have QE's. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-23Coding Style Cleanup; update CHANGELOGWolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-01-1785xx: Get ride of old TLB setup codeKumar Gala
Now that all boards have been converted, remove old config code and the config option for the new style. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-1785xx: Reworked initial processor initKumar Gala
Reworked the initial processor initialzation sequence: * introduced cpu_early_init_f that is run in address space 1 (AS=1) * Moved TLB/LAW and CCSR init into cpu_early_init_f() * Reworked initial asm code to do most of the core init before TLBs The main reasons for these changes are to allow handling of 36-bit phys addresses in the future and some of the issues that will exist when we do that. There are a few caveats on what can be initialized via the LAW and TLB static tables: * TLB entry 14/15 can't be initialized via the TLB table * any LAW that covers the implicit boot window (4G-8M to 4G) must map to the code that is currently executing. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-1785xx: Introduce new tlb APIKumar Gala
Add a set of functions to manipulate TLB entries: * set_tlb() - write a tlb entry * invalidate_tlb() - invalidate a tlb array * disable_tlb() - disable a variable size tlb entry * init_tlbs() - setup initial tlbs based on static table Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-1685xx: Remove old style of LAW initKumar Gala
All boards are now using the new fsl_law code so we can drop the old version. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-1685xx: Move LAW init code into CKumar Gala
Move the initialization of the LAWs into C code and provide an API to allow modification of LAWs after init. Board code is responsible to provide a law_table and num_law_entries. We should be able to use the same code on 86xx as well. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-09Add QE brg freq and correct qe bus freq fdt update codeKim Phillips
Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-01-0985xx: add ability to upload QE firmwareTimur Tabi
Define the layout of a binary blob that contains a QE firmware and instructions on how to upload it. Add function qe_upload_firmware() to parse the blob and perform the actual upload. Add command-line command "qe fw" to take a firmware blob in memory and upload it. Update ft_cpu_setup() on 85xx to create the 'firmware' device tree node if U-Boot has uploaded a firmware. Fully define 'struct rsp' in immap_qe.h to include the actual RISC Special Registers. Signed-off-by: Timur Tabi <timur@freescale.com>
2008-01-0985xx: Remove cache config from configs.hKumar Gala
Either use the standard defines in asm/cache.h or grab the information at runtime from the L1CFG SPR. Also, minor cleanup in cache.h to make the code a bit more readable. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-09Reworked FSL Book-E TLB macros to be more readableKumar Gala
The old macros made it difficult to know what WIMGE and perm bits were set for a TLB entry. Actually use the bit masks for these items since they are only a single bit. Also moved the macros into mmu.h out of e500.h since they aren't specific to e500. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11Handle Asynchronous DDR clock on 85xxKumar Gala
The MPC8572 introduces the concept of an asynchronous DDR clock with regards to the platform clock. Introduce get_ddr_freq() to report the DDR freq regardless of sync/async mode. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11Stop using immap_t on 85xxKumar Gala
In the future the offsets to various blocks may not be in same location. Move to using CFG_MPC85xx_*_ADDR as the base of the registers instead of getting it via &immap. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11Remove CONFIG_OF_FLAT_TREE related code from mpc85xx since we now use libfdtKumar Gala
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11Stop using immap_t for cpm offset on 85xxKumar Gala
In the future the offsets to various blocks may not be in same location. Move to using CFG_MPC85xx_CPM_ADDR as the base of the CPM registers instead of getting it via &immap->im_cpm. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11Stop using immap_t for guts offset on 85xxKumar Gala
In the future the offsets to various blocks may not be in same location. Move to using CFG_MPC85xx_GUTS_ADDR as the base of the guts registers instead of getting it via &immap->im_gur. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11Add libfdt based ft_cpu_setup for mpc85xxKumar Gala
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-11-03Cleanup coding style; update CHANGELOGWolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-10-19Setting MSR[DE] in do_reseturwithsughosh@gmail.com
Hello, This patch ensures the soft reset of the board for the 85xx boards by setting the MSR[DE] in the do_reset function. Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
2007-10-19MSR overwrite fixurwithsughosh@gmail.com
Hello, This patch fixes the MSR overwrite in the start.S when moving out of the last 4K page. Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
2007-10-19Remove magic numbers from cache related operations for mpc85xxKumar Gala
The mpc85xx start code uses some magic numbers that we actually have #defines for in <config.h> so use those instead. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-2685xx io out functions need sync after write.Ed Swarthout
This fixes the mc146818 rtc_read/write functions for 85xx. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
2007-08-29Enable L2 cache for MPC8568MDS boardHaiying Wang
The L2 cache size is 512KB for 8568, print out the correct informaiton. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2007-08-1485xxCDS: Add make targets for legacy systems.Randy Vinson
The PCI ID select values on the Arcadia main board differ depending on the version of the hardware. The standard configuration supports Rev 3.1. The legacy target supports Rev 2.x. Signed-off-by Randy Vinson <rvinson@mvista.com>
2007-08-14Add support for UEC to 8568Andy Fleming
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-08-14Empirically set cpo and clk_adjust for mpc85xx DDR2 supportHaiying Wang
This patch is against u-boot-mpc85xx.git of www.denx.com Setting cpo to 0x9 for frequencies higher than 333MHz is verified on both MPC8548CDS board and MPC8568MDS board, especially for supporting 533MHz DDR2. Setting clk_adjust to 0x6(3/4 late cycle) for MPC8568MDS board is for DDR2 on all current board versions especially ver 1.92 or later to bring up. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2007-08-14Use an absolute address when jumping out of 4k boot pageKumar Gala
On e500 when we leave the 4k boot page we should use an absolute address since we don't know where the board code may want us to be really running at. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-08-14MPC85xx BA bits not set for 3-bit bank address DIMMAndy Fleming
The current implementation does not set the number of bank address bits (BA) in the processor. The default assumes 2 logical bank bits. This works fine for a DIMM that uses devices with 4 internal banks (SPD byte17 = 0x4) but needs to be set appropriately for a DIMM that uses devices with 8 internal banks (SPD byte17 = 0x8). Signed-off-by: Greg Davis <DavisG@embeddedplanet.com>
2007-08-14Fix minor 85xx warningsAndy Fleming
Some patches had inserted warnings into the build: * mpc8560ads declared data without using it * cpu_init declared ecm and immap without using it in all CONFIGs * MPC8548CDS.h had its default filenames changed so that they contained "\m" in the paths. Made the defaults not Windows-specific (or anything-specific) Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-08-1485xx start.S cleanup and exception supportAndy Fleming
From: Ed Swarthout <Ed.Swarthout@freescale.com> Support external interrupts from platform to eliminate system hangs. Define CONFIG_INTERRUPTS board configure option to enable. Enable ecm, ddr, lbc, and pci/pcie error interrupts in PIC. Remove extra cpu initialization redundant with hardware initialization. Whitespace cleanup. Define and use _START_OFFSET consistent with other processors using ppc_asm.tmpl Move additional code from .text to boot page to make room for exception vectors at start of image. Handle Machine Check, External and Critical exceptions. Fix e500 machine check error determination in traps.c TEXT_BASE can now be 0xfffc_0000 - which cuts binary image in half. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
2007-08-1485xx allow debugger to configure ddr.Ed Swarthout
Only check for mpc8548 rev 1 when compiled for 8548. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
2007-08-14mpc85xx L2 cache reporting and SRAM relocation option.Ed Swarthout
Allow debugger to override flash cs0/cs1 settings to enable alternate boot regions Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
2007-07-10cpu/ rtc/ include/: Remove lingering references to CFG_CMD_* symbols.Jon Loeliger
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-07-09cpu/m*: Remove obsolete references to CONFIG_COMMANDSJon Loeliger
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-07-05Fix #if typo in CONFIG_CMD_* changes.Jon Loeliger
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-07-04cpu/mpc*/ : Augment CONFIG_COMMANDS tests with defined(CONFIG_CMD_*).Jon Loeliger
This is a compatibility step that allows both the older form and the new form to co-exist for a while until the older can be removed entirely. All transformations are of the form: Before: #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) After: #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT) Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-07-03Merge with /home/wd/git/u-boot/custodian/u-boot-testingWolfgang Denk
2007-06-22[ppc] Fix build breakage for all non-4xx PowerPC variants.Rafal Jaworowski
- adapt to the more generic EXCEPTION_PROLOG and CRIT_EXCEPTION macros - minor 4xx cleanup
2007-05-17Reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECxKim Phillips
For all practical u-boot purposes, TSECs don't differ throughout the mpc8[356]xx families; reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-05-05Coding stylke cleanup; update CHANGELOG.Wolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-05-02Cleaned up some 85xx PCI bugsAndy Fleming
* Cleaned up the CDS PCI Config Tables and added NULL entries to the end * Fixed PCIe LAWBAR assignemt to use the cpu-relative address * Fixed 85xx PCI code to assign powar region sizes based on the config values (rather than hard-coding them) * Fixed the 8548 CDS PCI2 IO to once again have 0 as the base address Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-05-02Add support for the 8568 MDS boardAndy Fleming
This included some changes to common files: * Add 8568 processor SVR to various places * Add support for setting the qe bus-frequency value in the dts * Add the 8568MDS target to the Makefile Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-04-23Reworked 85xx speed detection codeAndy Fleming
Changed the code to read the registers and calculate the clock rates, rather than using a "switch" statement. Idea from Andrew Klossner <andrew@cesa.opbu.xerox.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-04-23Support 1G size on 8548Andy Fleming
e500v2 and newer cores support 1G page sizes. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-04-23Only set ddrioovcr for 8548 rev1.Andy Fleming
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-04-23Tweak DDR ECC error counterAndy Fleming
Enable single-bit error counter when memory was cleared by ddr controller. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-04-2385xx: write MAC address to mac-address and local-mac-addressTimur Tabi
Some device trees have a mac-address property, some have local-mac-address, and some have both. To support all of these device trees, ftp_cpu_setup() should write the MAC address to mac-address and local-mac-address, if they exist. Signed-off-by: Timur Tabi <timur@freescale.com>
2007-04-23Some 85xx cpu cleanupsAndy Fleming
* Cleaned up the TSR[WIS] clearing * Cleaned up DMA initialization Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
2007-04-23Add cpu support for the 8544Andy Fleming
Recognize new SVR values, and add a few register definitions Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
2007-04-23u-boot: Fix e500 v2 core reset bugZang Roy-r61911
The following patch fixes the e500 v2 core reset bug. For e500 v2 core, a new reset control register is added to reset the processor. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
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