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2007-06-25Merge with git://www.denx.de/git/u-boot.gitStefan Roese
2007-06-25ppc4xx: PPC440EPx Emit DDR0 registers on machine check interruptNiklaus Giger
This patch prints the DDR status registers upon machine check interrupt on the 440EPx/GRx. This can be useful especially when ECC support is enabled. I added some small changes to the original patch from Niklaus to make it compile clean. Signed-off-by: Niklaus Giger <niklaus.giger@nestal.com> Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-25ppc4xx: Fix O=buildir buildsNiklaus Giger
This patch fixes the problem to assemble cpu/ppc4xx/start.S experienced last week where building failed having specified O=../build.sequoia. Signed-off-by: Niklaus Giger <niklaus.giger@nestal.com>
2007-06-25ppc4xx: Add pci_pre_init() for 405 boardsMatthias Fuchs
This patch adds support for calling a plattform dependant pci_pre_init() function for 405 boards. This can be used to move the current pci_405gp_fixup_irq() function into the board code. This patch also makes the CFG_PCI_PRE_INIT define obsolete. A default function with 'weak' attribute is used when a board specific pci_pre_init() is not implemented. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2007-06-22Coding stylke cleanup; rebuild CHANGELOGWolfgang Denk
2007-06-22Extend POST support for PPC440Igor Lisitsin
Added memory, CPU, UART, I2C and SPR POST tests for PPC440. Signed-off-by: Igor Lisitsin <igor@emcraft.com> --
2007-06-22ppc4xx: Fix problem with extended program_tlb() funtionStefan Roese
The recently extended program_tlb() function had a problem when multiple TLB's had to be setup (for example with 512MB of SDRAM). The virtual address was not incremented. This patch fixes this issue and is tested on Katmai with 512MB SDRAM. Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-22[ppc] Fix build breakage for all non-4xx PowerPC variants.Rafal Jaworowski
- adapt to the more generic EXCEPTION_PROLOG and CRIT_EXCEPTION macros - minor 4xx cleanup
2007-06-20Coding style cleanup. Refresh CHANGELOG.Wolfgang Denk
2007-06-20Merge with git://www.denx.de/git/u-boot.gitStefan Roese
2007-06-19[ppc4xx] Fix problem with NAND booting on AMCC AcadiaStefan Roese
The latest changes showed a problem with the location of the NAND-SPL image in the OCM and the init-data area (incl. cache). This patch fixes this problem. Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-15Merge with /home/stefan/git/u-boot/denx-440-exceptionsStefan Roese
2007-06-15ppc4xx: Clean up 440 exceptions handlingGrzegorz Bernacki
- Introduced dedicated switches for building 440 and 405 images required for 440-specific machine instructions like 'rfmci' etc. - Exception vectors moved to the proper location (_start moved away from the critical exception handler space, which it occupied) - CriticalInput now serviced (with default handler) - MachineCheck properly serviced (added a dedicated handler and return subroutine) - Overall cleanup of exceptions declared with STD_EXCEPTION macro (unused, unhandled and those not relevant for 4xx were eliminated) - Eliminated Linux leftovers, removed dead code Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com> Signed-off-by: Rafal Jaworowski <raj@semihalf.com> Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-15[ppc4xx] Extend 44x GPIO setup with default output stateStefan Roese
The board config array CFG_440_GPIO_TABLE for the ppc440 GPIO setup is extended with the default GPIO output state (level). Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-14[ppc4xx] Extend program_tlb() with virtual & physical addressesStefan Roese
Now program_tlb() allows to program a TLB (or multiple) with different virtual and physical addresses. With this change, now one physical region (e.g. SDRAM) can be mapped 2 times, once with caches diabled and once with caches enabled. Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-08Fix config problems on SC3 board; make ide_reset_timeout work.Wolfgang Denk
2007-06-08[PATCH] fix gpio setting when using CFG_440_GPIO_TABLEBenoît Monin
Set the correct value in GPIOx_TCR when configuring the gpio with CFG_440_GPIO_TABLE. Signed-off-by: Benoit Monin <bmonin@adeneo.eu> Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-06ppc4xx: Add NAND booting support for AMCC Acadia (405EZ) eval boardStefan Roese
This patch adds NAND booting support for the AMCC Acadia eval board. Please make sure to configure jumper J7 to position 2-3 when booting from NOR, and to position 1-2 when booting for NAND. I also added a board command to configure the I2C bootstrap EEPROM values. Right now only 267MHz is support for booting either via NOR or NAND FLASH. Here the usage: => bootstrap 267 nor ;to configure the board for 267MHz NOR booting => bootstrap 267 nand ;to configure the board for 267MHz NNAND booting Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-04[PATCH] Fix ppc4xx bootstrap letter displayed on startupBenoît Monin
The attached patch is mainly cosmetic, allowing u-boot to display the correct bootstrap option letter according to the datasheets. The original patch was extended with 405EZ support by Stefan Roese. Signed-off-by: Benoit Monin <bmonin@adeneo.eu> Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-01Merge with /home/stefan/git/u-boot/bamboo-nandStefan Roese
2007-06-01ppc4xx: Add NAND booting support for AMCC Bamboo (440EP) eval boardStefan Roese
This patch adds NAND booting support for the AMCC Bamboo eval board. Since the NAND-SPL boot image is limited to 4kbytes, this version only supports the onboard 64MBytes of DDR. The DIMM modules can't be supported, since the setup code for I2C DIMM autodetection and configuration is too big for this NAND bootloader. Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-01NAND: Add hardware ECC support to the PPC4xx NAND driver ndfc.cStefan Roese
This patch adds hardware ECC support to the NDFC driver. It also changes the register access from using the "simple" in32/out32 functions to the in_be32/out_be32 functions, which make sure that the access is correctly synced. This is the only recommended access to SoC registers in the current Linux kernel. Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-01ppc4xx: 44x DDR driver code cleanup and small fix for BambooStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-01ppc4xx: Update 44x_spd_ddr2 code (440SP/440SPe)Stefan Roese
Add config option for 180 degree advance clock control as needed for the AMCC Luan eval board. Signed-off-by: Stefan Roese <sr@denx.de>
2007-05-22ppc4xx: Add 405 support to 4xx NAND driver ndfc.cStefan Roese
This patch adds support for 405 PPC's to the 4xx NAND driver ndfc.c. This is in preparation for the new AMCC 405EZ. Signed-off-by: Stefan Roese <sr@denx.de>
2007-05-21ppc4xx: Fix problem in 405EZ OCM initializationStefan Roese
As spotted by Bruce Adler this patch fixes an initialization problem for the 405EZ OCM. Signed-off-by: Stefan Roese <sr@denx.de>
2007-05-05Coding stylke cleanup; update CHANGELOG.Wolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-04-29Merge with git://www.denx.de/git/u-boot.gitStefan Roese
2007-04-24ppc4xx: setup 440EPx/GRx ZMII/RGMII bridge depending on PFC register content.Matthias Fuchs
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2007-04-18Merge with /home/wd/git/u-boot/custodian/u-boot-74xx-7xxWolfgang Denk
2007-04-18ppc4xx: Add output for bootrom location to 405EZ portsStefan Roese
Now 405EZ ports also show upon bootup from which boot device they are configured to boot: U-Boot 1.2.0-gd3832e8f-dirty (Apr 18 2007 - 07:47:05) CPU: AMCC PowerPC 405EZ Rev. A at 199.999 MHz (PLB=133, OPB=66, EBC=66 MHz) Bootstrap Option E - Boot ROM Location EBC (32 bits) 16 kB I-Cache 16 kB D-Cache Board: Acadia - AMCC PPC405EZ Evaluation Board Signed-off-by: Stefan Roese <sr@denx.de>
2007-04-12ppc4xx: Fix i2c divisor calcularion for PPC4xxJeffrey Mann
This patch fixes changes the i2c_init(...) function to use the function get_OPB_freq() rather than calculating the OPB speed by sysInfo.freqPLB/sysInfo.pllOpbDiv. The get_OPB_freq() function is specific per processor. The prior method was not and so was calculating the wrong speed for some PPC4xx processors. Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com> Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-31ppc4xx: Update 44x_spd_ddr2 code (440SP/440SPe)Stefan Roese
Additional RAM information is now printed upon powerup, like DDR2 frequency and CAS latency. Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-31ppc4xx: Update 44x_spd_ddr2 code (440SP/440SPe)Stefan Roese
Fix a bug in the auto calibration routine. This driver now runs more reliable with the tested modules. It's also tested with 167MHz PLB frequency (667MHz DDR2 frequency) on the Katmai. Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-24Merge with /home/stefan/git/u-boot/acadiaStefan Roese
2007-03-24[PATCH] Add 4xx GPIO functionsStefan Roese
This patch adds some 4xx GPIO functions. It also moves some of the common code and defines into a common 4xx GPIO header file. Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-24[PATCH] Clean up 40EZ/Acadia supportStefan Roese
This patch cleans up all the open issue of the preliminary Acadia support. Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-21Merge with /home/stefan/git/u-boot/acadiaStefan Roese
2007-03-21[PATCH] Add AMCC PPC405EZ supportStefan Roese
This patch adds support for the new AMCC 405EZ PPC. It is in preparation for the AMCC Acadia board support. Please note that this Acadia/405EZ support is still in a beta stage. Still lot's of cleanup needed but we need a preliminary release now. Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-08[PATCH] 4xx: allow CONFIG_I2C_CMD_TREE without CONFIG_I2C_MULTI_BUSMatthias Fuchs
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2007-03-08Merge with /home/git/u-bootWolfgang Denk
2007-03-08Merge with /home/wd/git/u-boot/custodian/u-boot-ppc4xxWolfgang Denk
2007-03-08Merge with /home/git/u-bootWolfgang Denk
2007-03-08Merge with /home/stefan/git/u-boot/yucca-ddr2Stefan Roese
2007-03-08[PATCH] Update AMCC Luan 440SP eval board supportStefan Roese
The AMCC Luan now uses the common 440SP(e) DDR SPD code for DDR inititializition. This includes DDR auto calibration and support for different DIMM modules, instead of the fixed setup used in the earlier version. This patch also enables the cache in FLASH for the startup phase of U-Boot (while running from FLASH). After relocating to SDRAM the cache is disabled again. This will speed up the boot process, especially the SDRAM setup, since there are some loops for memory testing (auto calibration). Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-08ppc4xx: Update 440SP/440SPe DDR SPD setup code to support 440SPStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-07Merge with /home/wd/git/u-boot/custodian/u-boot-ppc4xxWolfgang Denk
2007-03-07[PATCH] Fix AMCC 44x SPD SDRAM init code to support 2 DIMM'sStefan Roese
This patch fixes a problem that occurs when 2 DIMM's are used. This problem was first spotted and fixed by Gerald Jackson <gerald.jackson@reaonixsecurity.com> but this patch fixes the problem in a little more clever way. This patch also adds the nice functionality to dynamically create the TLB entries for the SDRAM (tlb.c). So we should never run into such problems with wrong (too short) TLB initialization again on these platforms. As this feature is new to the "old" 44x SPD DDR driver, it has to be enabled via the CONFIG_PROG_SDRAM_TLB define. Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-06Restructure POST directory to support of other CPUs, boards, etc.Wolfgang Denk
2007-03-04Some code cleanup.Wolfgang Denk