| Age | Commit message (Collapse) | Author |
|---|
|
Relocate the u-boot image into SDRAM like everyone else does. This
means that we can handle much larger .data and .bss than we used to.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
|
|
Rewrite the resource management code (i.e. I/O memory, clock gating,
gpio) so it doesn't depend on any global state. This is necessary
because this code is heavily used before relocation to RAM, so we
can't write to any global variables.
As an added bonus, this makes u-boot's memory footprint a bit smaller,
although some functionality has been left out; all clocks are enabled
all the time, and there's no checking for gpio line conflicts.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
|
|
Split the avr32 initialization code into a function to run before
relocation, board_init_f and a function to run after relocation,
board_init_r. For now, board_init_f simply calls board_init_r
at the end.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
|
|
|
|
|
|
|
|
|
|
Modifications to the existing code to support the new fdt command.
|
|
|
|
Additional RAM information is now printed upon powerup, like
DDR2 frequency and CAS latency.
Signed-off-by: Stefan Roese <sr@denx.de>
|
|
Fix a bug in the auto calibration routine. This driver now runs
more reliable with the tested modules. It's also tested with
167MHz PLB frequency (667MHz DDR2 frequency) on the Katmai.
Signed-off-by: Stefan Roese <sr@denx.de>
|
|
|
|
Reset support
BSP autoconfig support
|
|
|
|
This patch adds some 4xx GPIO functions. It also moves some of the
common code and defines into a common 4xx GPIO header file.
Signed-off-by: Stefan Roese <sr@denx.de>
|
|
This patch cleans up all the open issue of the preliminary
Acadia support.
Signed-off-by: Stefan Roese <sr@denx.de>
|
|
Prevent false interrupt from hanging Linux as MSR[EE] is set
to enable interrupts by changing the PIC out of the default
pass through mode into mixed mode.
Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
|
|
Without this patch, I am unable to get to the prompt on rev 2 silicon.
Only set ddrioovcr for rev1.
Signed-off-by: Ed Swarthout<ed.swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
|
|
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
|
|
|
|
|
|
|
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
|
|
|
|
This patch adds support for the new AMCC 405EZ PPC. It is in
preparation for the AMCC Acadia board support.
Please note that this Acadia/405EZ support is still in a beta stage.
Still lot's of cleanup needed but we need a preliminary release now.
Signed-off-by: Stefan Roese <sr@denx.de>
|
|
for the SIUMCR and BCR Register.
Fix the calculation for the EEprom Size
Signed-off-by: Heiko Schocher <hs@denx.de>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
timer support
interrupt controller support
flash support
ethernet support
cache support
board information support
env support
booting image support
adding support for Xilinx ML401
|
|
timer support
interrupt controller support
flash support
ethernet support
cache support
board information support
env support
booting image support
adding support for Xilinx ML401
|
|
|
|
support
|
|
|
|
|
|
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
|
|
|
|
|
|
|
|
The AMCC Luan now uses the common 440SP(e) DDR SPD code for DDR
inititializition. This includes DDR auto calibration and support
for different DIMM modules, instead of the fixed setup used in
the earlier version.
This patch also enables the cache in FLASH for the startup
phase of U-Boot (while running from FLASH). After relocating to
SDRAM the cache is disabled again. This will speed up the boot
process, especially the SDRAM setup, since there are some loops
for memory testing (auto calibration).
Signed-off-by: Stefan Roese <sr@denx.de>
|
|
Signed-off-by: Stefan Roese <sr@denx.de>
|
|
|
|
This patch fixes a problem that occurs when 2 DIMM's are
used. This problem was first spotted and fixed by Gerald Jackson
<gerald.jackson@reaonixsecurity.com> but this patch fixes the
problem in a little more clever way.
This patch also adds the nice functionality to dynamically
create the TLB entries for the SDRAM (tlb.c). So we should
never run into such problems with wrong (too short) TLB
initialization again on these platforms.
As this feature is new to the "old" 44x SPD DDR driver, it
has to be enabled via the CONFIG_PROG_SDRAM_TLB define.
Signed-off-by: Stefan Roese <sr@denx.de>
|
|
|
|
The config value for:
* CFG_ACR_PIPE_DEP
* CFG_ACR_RPTCNT
* CFG_SPCR_TSEC1EP
* CFG_SPCR_TSEC2EP
* CFG_SCCR_TSEC1CM
* CFG_SCCR_TSEC2CM
Were not being used when setting the appropriate register
Added:
* CFG_SCCR_USBMPHCM
* CFG_SCCR_USBDRCM
* CFG_SCCR_PCICM
* CFG_SCCR_ENCCM
To allow full config of the SCCR.
Also removed random CFG_SCCR settings in MPC8349EMDS, TQM834x, and sbc8349
that were just bogus.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
|
8360 and 832x weren't updating their [local-]mac-address
properties. This patch fixes that.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
|
Some device trees have a mac-address property, some have local-mac-address,
and some have both. To support all of these device trees, this patch
updates ftp_cpu_setup() to write the MAC address to mac-address if it exists.
This function already updates local-mac-address.
Signed-off-by: Timur Tabi <timur@freescale.com>
|
