From aa5f1f9dc815a76f6dffb580798599c028fe7feb Mon Sep 17 00:00:00 2001 From: TsiChungLiew Date: Mon, 14 Jan 2008 17:23:08 -0600 Subject: ColdFire: Add M5373EVB platform support - 2 Signed-off-by: TsiChungLiew Signed-off by: John Rigby --- MAKEALL | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'MAKEALL') diff --git a/MAKEALL b/MAKEALL index c9bd5e1b7..4048f8b11 100755 --- a/MAKEALL +++ b/MAKEALL @@ -649,7 +649,8 @@ LIST_coldfire=" \ M5271EVB \ M5272C3 \ M5282EVB \ - M5329EVB \ + M5329AFEE \ + M5373EVB \ M54455EVB \ r5200 \ TASREG \ -- cgit v1.2.3 From 1552af70ecab11b9f3dceff7528ed15faf678b9d Mon Sep 17 00:00:00 2001 From: TsiChungLiew Date: Mon, 14 Jan 2008 17:43:33 -0600 Subject: ColdFire: Add MCF5227x cpu and M52277EVB support-1 Signed-off-by: TsiChungLiew Signed-off by: John Rigby --- MAINTAINERS | 1 + MAKEALL | 1 + Makefile | 3 + README | 1 + board/freescale/m52277evb/Makefile | 44 ++++++ board/freescale/m52277evb/config.mk | 25 ++++ board/freescale/m52277evb/m52277evb.c | 86 ++++++++++++ board/freescale/m52277evb/u-boot.lds | 145 ++++++++++++++++++++ doc/README.m52277evb | 237 ++++++++++++++++++++++++++++++++ include/asm-m68k/global_data.h | 3 + include/asm-m68k/immap.h | 34 +++++ include/configs/M52277EVB.h | 251 ++++++++++++++++++++++++++++++++++ lib_m68k/board.c | 10 ++ 13 files changed, 841 insertions(+) create mode 100644 board/freescale/m52277evb/Makefile create mode 100644 board/freescale/m52277evb/config.mk create mode 100644 board/freescale/m52277evb/m52277evb.c create mode 100644 board/freescale/m52277evb/u-boot.lds create mode 100644 doc/README.m52277evb create mode 100644 include/configs/M52277EVB.h (limited to 'MAKEALL') diff --git a/MAINTAINERS b/MAINTAINERS index 6b4bfe70d..3d35b3e1d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -647,6 +647,7 @@ Zachary P. Landau TsiChung Liew + M52277EVB mcf5227x M5235EVB mcf52x2 M5329EVB mcf532x M5373EVB mcf532x diff --git a/MAKEALL b/MAKEALL index 4048f8b11..744fd9b72 100755 --- a/MAKEALL +++ b/MAKEALL @@ -643,6 +643,7 @@ LIST_coldfire=" \ EB+MCF-EV123 \ EB+MCF-EV123_internal \ idmr \ + M52277EVB \ M5235EVB \ M5249EVB \ M5253EVB \ diff --git a/Makefile b/Makefile index d6e4d74cd..a672f3a35 100644 --- a/Makefile +++ b/Makefile @@ -1739,6 +1739,9 @@ ZPC1900_config: unconfig ## Coldfire ######################################################################### +M52277EVB_config: unconfig + @$(MKCONFIG) -a M52277EVB m68k mcf5227x m52277evb freescale + M5235EVB_config \ M5235EVB_Flash16_config \ M5235EVB_Flash32_config: unconfig diff --git a/README b/README index f2a491492..09dda5376 100644 --- a/README +++ b/README @@ -136,6 +136,7 @@ Directory Hierarchy: - i386 Files specific to i386 CPUs - ixp Files specific to Intel XScale IXP CPUs - mcf52x2 Files specific to Freescale ColdFire MCF52x2 CPUs + - mcf5227x Files specific to Freescale ColdFire MCF5227x CPUs - mcf532x Files specific to Freescale ColdFire MCF5329 CPUs - mcf5445x Files specific to Freescale ColdFire MCF5445x CPUs - mips Files specific to MIPS CPUs diff --git a/board/freescale/m52277evb/Makefile b/board/freescale/m52277evb/Makefile new file mode 100644 index 000000000..981763d20 --- /dev/null +++ b/board/freescale/m52277evb/Makefile @@ -0,0 +1,44 @@ +# +# (C) Copyright 2000-2003 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS = $(BOARD).o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/freescale/m52277evb/config.mk b/board/freescale/m52277evb/config.mk new file mode 100644 index 000000000..ce014edca --- /dev/null +++ b/board/freescale/m52277evb/config.mk @@ -0,0 +1,25 @@ +# +# (C) Copyright 2000-2003 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# Coldfire contribution by Bernhard Kuhn +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +TEXT_BASE = 0 diff --git a/board/freescale/m52277evb/m52277evb.c b/board/freescale/m52277evb/m52277evb.c new file mode 100644 index 000000000..98424c898 --- /dev/null +++ b/board/freescale/m52277evb/m52277evb.c @@ -0,0 +1,86 @@ +/* + * (C) Copyright 2000-2003 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. + * TsiChung Liew (Tsi-Chung.Liew@freescale.com) + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +int checkboard(void) +{ + puts("Board: "); + puts("Freescale M52277 EVB\n"); + return 0; +}; + +long int initdram(int board_type) +{ + volatile sdramc_t *sdram = (volatile sdramc_t *)(MMAP_SDRAM); + u32 dramsize, i; + + dramsize = CFG_SDRAM_SIZE * 0x100000; + + for (i = 0x13; i < 0x20; i++) { + if (dramsize == (1 << i)) + break; + } + i--; + + sdram->sdcs0 = (CFG_SDRAM_BASE | i); + + sdram->sdcfg1 = CFG_SDRAM_CFG1; + sdram->sdcfg2 = CFG_SDRAM_CFG2; + + /* Issue PALL */ + sdram->sdcr = CFG_SDRAM_CTRL | 2; + + /* Issue LEMR */ + /*sdram->sdmr = CFG_SDRAM_EMOD; */ + sdram->sdmr = CFG_SDRAM_MODE; + + udelay(1000); + + /* Issue PALL */ + sdram->sdcr = CFG_SDRAM_CTRL | 2; + + /* Perform two refresh cycles */ + sdram->sdcr = CFG_SDRAM_CTRL | 4; + sdram->sdcr = CFG_SDRAM_CTRL | 4; + + sdram->sdcr = (CFG_SDRAM_CTRL & ~0x80000000) | 0x10000c00; + + udelay(100); + + return (dramsize); +}; + +int testdram(void) +{ + /* TODO: XXX XXX XXX */ + printf("DRAM test not implemented!\n"); + + return (0); +} diff --git a/board/freescale/m52277evb/u-boot.lds b/board/freescale/m52277evb/u-boot.lds new file mode 100644 index 000000000..9125bfc84 --- /dev/null +++ b/board/freescale/m52277evb/u-boot.lds @@ -0,0 +1,145 @@ +/* + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(m68k) +SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); +/* Do we need any of these for elf? + __DYNAMIC = 0; */ +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + .text : + { + /* WARNING - the following is hand-optimized to fit within */ + /* the sector layout of our flash chips! XXX FIXME XXX */ + + cpu/mcf5227x/start.o (.text) + cpu/mcf5227x/libmcf5227x.a (.text) + lib_m68k/libm68k.a (.text) + lib_generic/libgeneric.a (.text) + common/cmd_mem.o (.text) + common/main.o (.text) + + . = DEFINED(env_offset) ? env_offset : .; + common/environment.o (.text) + + *(.text) + *(.fixup) + *(.got1) + } + _etext = .; + PROVIDE (etext = .); + .rodata : + { + *(.rodata) + *(.rodata1) + } + .fini : { *(.fini) } =0 + .ctors : { *(.ctors) } + .dtors : { *(.dtors) } + + /* Read-write section, merged into data segment: */ + . = (. + 0x00FF) & 0xFFFFFF00; + _erotext = .; + PROVIDE (erotext = .); + + .reloc : + { + __got_start = .; + *(.got) + __got_end = .; + _GOT2_TABLE_ = .; + *(.got2) + _FIXUP_TABLE_ = .; + *(.fixup) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; + __fixup_entries = (. - _FIXUP_TABLE_)>>2; + + .data : + { + *(.data) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + + . = .; + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(256); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(256); + __init_end = .; + + __bss_start = .; + .bss : + { + _sbss = .; + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + . = ALIGN(4); + _ebss = .; + } + _end = . ; + PROVIDE (end = .); +} diff --git a/doc/README.m52277evb b/doc/README.m52277evb new file mode 100644 index 000000000..de1dabade --- /dev/null +++ b/doc/README.m52277evb @@ -0,0 +1,237 @@ +Freescale MCF52277EVB ColdFire Development Board +================================================ + +TsiChung Liew(Tsi-Chung.Liew@freescale.com) +Created Jan 8, 2008 +=========================================== + + +Changed files: +============== + +- board/freescale/m52277evb/m52277evb.c Dram setup +- board/freescale/m52277evb/Makefile Makefile +- board/freescale/m52277evb/config.mk config make +- board/freescale/m52277evb/u-boot.lds Linker description + +- cpu/mcf5227x/cpu.c cpu specific code +- cpu/mcf5227x/cpu_init.c FBCS, Mux pins, icache and RTC extra regs +- cpu/mcf5227x/interrupts.c cpu specific interrupt support +- cpu/mcf5227x/speed.c system, flexbus, and cpu clock +- cpu/mcf5227x/Makefile Makefile +- cpu/mcf5227x/config.mk config make +- cpu/mcf5227x/start.S start up assembly code + +- doc/README.m52277evb This readme file + +- drivers/serial/mcfuart.c ColdFire common UART driver +- drivers/rtc/mcfrtc.c Realtime clock Driver + +- include/asm-m68k/bitops.h Bit operation function export +- include/asm-m68k/byteorder.h Byte order functions +- include/asm-m68k/crossbar.h CrossBar structure and definition +- include/asm-m68k/dspi.h DSPI structure and definition +- include/asm-m68k/edma.h eDMA structure and definition +- include/asm-m68k/flexbus.h FlexBus structure and definition +- include/asm-m68k/fsl_i2c.h I2C structure and definition +- include/asm-m68k/global_data.h Global data structure +- include/asm-m68k/immap.h ColdFire specific header file and driver macros +- include/asm-m68k/immap_5227x.h mcf5227x specific header file +- include/asm-m68k/io.h io functions +- include/asm-m68k/lcd.h LCD structure and definition +- include/asm-m68k/m5227x.h mcf5227x specific header file +- include/asm-m68k/posix_types.h Posix +- include/asm-m68k/processor.h header file +- include/asm-m68k/ptrace.h Exception structure +- include/asm-m68k/rtc.h Realtime clock header file +- include/asm-m68k/ssi.h SSI structure and definition +- include/asm-m68k/string.h String function export +- include/asm-m68k/timer.h Timer structure and definition +- include/asm-m68k/types.h Data types definition +- include/asm-m68k/uart.h Uart structure and definition +- include/asm-m68k/u-boot.h u-boot structure + +- include/configs/M52277EVB.h Board specific configuration file + +- lib_m68k/board.c board init function +- lib_m68k/cache.c +- lib_m68k/interrupts Coldfire common interrupt functions +- lib_m68k/m68k_linux.c +- lib_m68k/time.c Timer functions (Dma timer and PIT) +- lib_m68k/traps.c Exception init code + +1 MCF52277 specific Options/Settings +==================================== +1.1 pre-loader is no longer suppoer in this coldfire family + +1.2 Configuration settings for M52277EVB Development Board +CONFIG_MCF5227x -- define for all MCF5227x CPUs +CONFIG_M52277 -- define for all Freescale MCF52277 CPUs +CONFIG_M52277EVB -- define for M52277EVB board + +CONFIG_MCFUART -- define to use common CF Uart driver +CFG_UART_PORT -- define UART port number, start with 0, 1 and 2 +CONFIG_BAUDRATE -- define UART baudrate + +CONFIG_MCFRTC -- define to use common CF RTC driver +CFG_MCFRTC_BASE -- provide base address for RTC in immap.h +CFG_RTC_OSCILLATOR -- define RTC clock frequency +RTC_DEBUG -- define to show RTC debug message +CONFIG_CMD_DATE -- enable to use date feature in u-boot + +CONFIG_MCFTMR -- define to use DMA timer +CONFIG_MCFPIT -- define to use PIT timer + +CONFIG_FSL_I2C -- define to use FSL common I2C driver +CONFIG_HARD_I2C -- define for I2C hardware support +CONFIG_SOFT_I2C -- define for I2C bit-banged +CFG_I2C_SPEED -- define for I2C speed +CFG_I2C_SLAVE -- define for I2C slave address +CFG_I2C_OFFSET -- define for I2C base address offset +CFG_IMMR -- define for MBAR offset + +CFG_MBAR -- define MBAR offset + +CONFIG_MONITOR_IS_IN_RAM -- Not support + +CFG_INIT_RAM_ADDR -- defines the base address of the MCF52277 internal SRAM + +CFG_CSn_BASE -- defines the Chip Select Base register +CFG_CSn_MASK -- defines the Chip Select Mask register +CFG_CSn_CTRL -- defines the Chip Select Control register + +CFG_SDRAM_BASE -- defines the DRAM Base + +CONFIG_LCD and CONFIG_CMD_USB are not supported in this current u-boot, +update will be provided at later time + +2. MEMORY MAP UNDER U-BOOT AND LINUX KERNEL +=========================================== +2.1. System memory map: + Flash: 0x00000000-0x3FFFFFFF (1024MB) + DDR: 0x40000000-0x7FFFFFFF (1024MB) + SRAM: 0x80000000-0x8FFFFFFF (256MB) + IP: 0xF0000000-0xFFFFFFFF (256MB) + +2.2. For the initial bringup, we adopted a consistent memory scheme between u-boot and + linux kernel, you can customize it based on your system requirements: + Flash0: 0x00000000-0x00FFFFFF (16MB) + + DDR: 0x40000000-0x4FFFFFFF (64MB) + SRAM: 0x80000000-0x80007FFF (32KB) + IP: 0xFC000000-0xFC0FFFFF (64KB) + +3. COMPILATION +============== +3.1 To create U-Boot the gcc-4.1-xx compiler set (ColdFire ELF or +uClinux version) from codesourcery.com was used. Download it from: +http://www.codesourcery.com/gnu_toolchains/coldfire/download.html + +3.2 Compilation + export CROSS_COMPILE=cross-compile-prefix + cd u-boot-1.x.x + make distclean + make M52277EVB_config + make + +4. SCREEN DUMP +============== +4.1 M52277EVB Development board + (NOTE: May not show exactly the same) + +U-Boot 1.3.1 (Jan 8 2008 - 12:44:08) + +CPU: Freescale MCF52277 (Mask:6c Version:0) + CPU CLK 160 Mhz BUS CLK 80 Mhz FLB CLK 80 MHZ + INP CLK 16 Mhz VCO CLK 480 Mhz +Board: Freescale 52277 EVB +I2C: ready +DRAM: 64 MB +FLASH: 16 MB +In: serial +Out: serial +Err: serial +-> print +baudrate=115200 +hostname=M52277EVB +inpclk=16000000 +loadaddr=(0x40000000 + 0x10000) +load=tftp ${loadaddr) ${u-boot} +upd=run load; run prog +prog=prot off 0 3ffff;era 0 3ffff;cp.b ${loadaddr} 0 ${filesize};save +u-boot=u-boot.bin +stdin=serial +stdout=serial +stderr=serial +mem=65024k + +Environment size: 280/32764 bytes +-> bdinfo +memstart = 0x40000000 +memsize = 0x04000000 +flashstart = 0x00000000 +flashsize = 0x01000000 +flashoffset = 0x00000000 +sramstart = 0x80000000 +sramsize = 0x00008000 +mbar = 0xFC000000 +busfreq = 80 MHz +flbfreq = 80 Mhz +inpfreq = 16 Mhz +vcofreq = 480 Mhz + +baudrate = 115200 bps +-> +-> help +? - alias for 'help' +autoscr - run script from memory +base - print or set address offset +bdinfo - print Board Info structure +boot - boot default, i.e., run 'bootcmd' +bootd - boot default, i.e., run 'bootcmd' +bootelf - Boot from an ELF image in memory +bootm - boot application image from memory +bootp - boot image via network using BootP/TFTP protocol +bootvx - Boot vxWorks from an ELF image +cmp - memory compare +coninfo - print console devices and information +cp - memory copy +crc32 - checksum calculation +date - get/set/reset date & time +dcache - enable or disable data cache +echo - echo args to console +erase - erase FLASH memory +flinfo - print FLASH memory information +go - start application at address 'addr' +help - print online help +icache - enable or disable instruction cache +icrc32 - checksum calculation +iloop - infinite loop on address range +imd - i2c memory display +iminfo - print header information for application image +imls - list all images found in flash +imm - i2c memory modify (auto-incrementing) +imw - memory write (fill) +inm - memory modify (constant address) +iprobe - probe to discover valid I2C chip addresses +itest - return true/false on integer compare +loadb - load binary file over serial line (kermit mode) +loads - load S-Record file over serial line +loady - load binary file over serial line (ymodem mode) +loop - infinite loop on address range +ls - list files in a directory (default /) +md - memory display +mm - memory modify (auto-incrementing) +mtest - simple RAM test +mw - memory write (fill) +nm - memory modify (constant address) +ping - send ICMP ECHO_REQUEST to network host +printenv- print environment variables +protect - enable or disable FLASH write protection +reset - Perform RESET of the CPU +run - run commands in an environment variable +saveenv - save environment variables to persistent storage +setenv - set environment variables +sleep - delay execution for some time +version - print monitor version +-> diff --git a/include/asm-m68k/global_data.h b/include/asm-m68k/global_data.h index 9d9894b1a..1e26eb037 100644 --- a/include/asm-m68k/global_data.h +++ b/include/asm-m68k/global_data.h @@ -53,6 +53,9 @@ typedef struct global_data { unsigned long env_addr; /* Address of Environment struct */ unsigned long env_valid; /* Checksum of Environment valid? */ unsigned long have_console; /* serial_init() was called */ +#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) + unsigned long fb_base; /* Base addr of framebuffer memory */ +#endif #ifdef CONFIG_BOARD_TYPES unsigned long board_type; #endif diff --git a/include/asm-m68k/immap.h b/include/asm-m68k/immap.h index 852d94158..9dd970772 100644 --- a/include/asm-m68k/immap.h +++ b/include/asm-m68k/immap.h @@ -26,6 +26,40 @@ #ifndef __IMMAP_H #define __IMMAP_H +#ifdef CONFIG_M52277 +#include +#include + +#define CFG_UART_BASE (MMAP_UART0 + (CFG_UART_PORT * 0x4000)) + +#define CFG_MCFRTC_BASE (MMAP_RTC) + +#ifdef CONFIG_LCD +#define CFG_LCD_BASE (MMAP_LCD) +#endif + +/* Timer */ +#ifdef CONFIG_MCFTMR +#define CFG_UDELAY_BASE (MMAP_DTMR0) +#define CFG_TMR_BASE (MMAP_DTMR1) +#define CFG_TMRPND_REG (((volatile int0_t *)(CFG_INTR_BASE))->iprh0) +#define CFG_TMRINTR_NO (INT0_HI_DTMR1) +#define CFG_TMRINTR_MASK (INTC_IPRH_INT33) +#define CFG_TMRINTR_PEND (CFG_TMRINTR_MASK) +#define CFG_TMRINTR_PRI (6) +#define CFG_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#endif + +#ifdef CONFIG_MCFPIT +#define CFG_UDELAY_BASE (MMAP_PIT0) +#define CFG_PIT_BASE (MMAP_PIT1) +#define CFG_PIT_PRESCALE (6) +#endif + +#define CFG_INTR_BASE (MMAP_INTC0) +#define CFG_NUM_IRQS (128) +#endif /* CONFIG_M52277 */ + #ifdef CONFIG_M5235 #include #include diff --git a/include/configs/M52277EVB.h b/include/configs/M52277EVB.h new file mode 100644 index 000000000..ab574d589 --- /dev/null +++ b/include/configs/M52277EVB.h @@ -0,0 +1,251 @@ +/* + * Configuation settings for the Freescale MCF52277 EVB board. + * + * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. + * TsiChung Liew (Tsi-Chung.Liew@freescale.com) + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * board/config.h - configuration options, board specific + */ + +#ifndef _M52277EVB_H +#define _M52277EVB_H + +/* + * High Level Configuration Options + * (easy to change) + */ +#define CONFIG_MCF5227x /* define processor family */ +#define CONFIG_M52277 /* define processor type */ +#define CONFIG_M52277EVB /* M52277EVB board */ + +#undef DEBUG + +#define CONFIG_MCFUART +#define CFG_UART_PORT (0) +#define CONFIG_BAUDRATE 115200 +#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } + +#undef CONFIG_WATCHDOG + +#define CONFIG_TIMESTAMP /* Print image info with timestamp */ + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + +/* Command line configuration */ +#include + +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_DATE +#define CONFIG_CMD_ELF +#define CONFIG_CMD_FLASH +#define CONFIG_CMD_I2C +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_LOADB +#define CONFIG_CMD_LOADS +#define CONFIG_CMD_MEMORY +#define CONFIG_CMD_MISC +#undef CONFIG_CMD_NET +#define CONFIG_CMD_REGINFO +#undef CONFIG_CMD_USB +#undef CONFIG_CMD_BMP + +#define CONFIG_HOSTNAME M52277EVB +#define CONFIG_EXTRA_ENV_SETTINGS \ + "inpclk=" MK_STR(CFG_INPUT_CLKSRC) "\0" \ + "loadaddr=" MK_STR(CFG_LOAD_ADDR) "\0" \ + "u-boot=u-boot.bin\0" \ + "load=tftp ${loadaddr) ${u-boot}\0" \ + "upd=run load; run prog\0" \ + "prog=prot off 0 0x3ffff;" \ + "era 0 3ffff;" \ + "cp.b ${loadaddr} 0 ${filesize};" \ + "save\0" \ + "" + +/* LCD */ +#ifdef CONFIG_CMD_BMP +#define CONFIG_LCD +#define CONFIG_SPLASH_SCREEN +#define CONFIG_LCD_LOGO +#define CONFIG_SHARP_LQ035Q7DH06 +#endif + +/* USB */ +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_STORAGE +#define CONFIG_DOS_PARTITION +#define CONFIG_MAC_PARTITION +#define CONFIG_ISO_PARTITION +#define CFG_USB_EHCI_REGS_BASE 0xFC0B0000 +#define CFG_USB_EHCI_CPU_INIT +#endif + +/* Realtime clock */ +#define CONFIG_MCFRTC +#undef RTC_DEBUG +#define CFG_RTC_OSCILLATOR (32 * CFG_HZ) + +/* Timer */ +#define CONFIG_MCFTMR +#undef CONFIG_MCFPIT + +/* I2c */ +#define CONFIG_FSL_I2C +#define CONFIG_HARD_I2C /* I2C with hardware support */ +#undef CONFIG_SOFT_I2C /* I2C bit-banged */ +#define CFG_I2C_SPEED 80000 /* I2C speed and slave address */ +#define CFG_I2C_SLAVE 0x7F +#define CFG_I2C_OFFSET 0x58000 +#define CFG_IMMR CFG_MBAR + +/* Input, PCI, Flexbus, and VCO */ +#define CONFIG_EXTRA_CLOCK + +#define CFG_INPUT_CLKSRC 16000000 + +#define CONFIG_PRAM 512 /* 512 KB */ + +#define CFG_PROMPT "-> " +#define CFG_LONGHELP /* undef to save memory */ + +#if defined(CONFIG_CMD_KGDB) +#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ +#else +#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#endif +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ + +#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 0x10000) + +#define CFG_HZ 1000 + +#define CFG_MBAR 0xFC000000 + +/* + * Low Level Configuration Settings + * (address mappings, register initial values, etc.) + * You should know what you are doing if you make changes here. + */ + +/*----------------------------------------------------------------------- + * Definitions for initial stack pointer and data area (in DPRAM) + */ +#define CFG_INIT_RAM_ADDR 0x80000000 +#define CFG_INIT_RAM_END 0x8000 /* End of used area in internal SRAM */ +#define CFG_INIT_RAM_CTRL 0x21 +#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ +#define CFG_GBL_DATA_OFFSET ((CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) - 16) +#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET + +/*----------------------------------------------------------------------- + * Start addresses for the final memory configuration + * (Set up by the startup code) + * Please note that CFG_SDRAM_BASE _must_ start at 0 + */ +#define CFG_SDRAM_BASE 0x40000000 +#define CFG_SDRAM_SIZE 64 /* SDRAM size in MB */ +#define CFG_SDRAM_CFG1 0x43711630 +#define CFG_SDRAM_CFG2 0x56670000 +#define CFG_SDRAM_CTRL 0xE1092000 +#define CFG_SDRAM_EMOD 0x81810000 +#define CFG_SDRAM_MODE 0x00CD0000 + +#define CFG_MEMTEST_START CFG_SDRAM_BASE + 0x400 +#define CFG_MEMTEST_END ((CFG_SDRAM_SIZE - 3) << 20) + +#define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400) +#define CFG_BOOTPARAMS_LEN 64*1024 +#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ +#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ + +/* Initial Memory map for Linux */ +#define CFG_BOOTMAPSZ (CFG_SDRAM_BASE + (CFG_SDRAM_SIZE << 20)) + +/* Configuration for environment + * Environment is embedded in u-boot in the second sector of the flash + */ +#define CFG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_OVERWRITE 1 +#undef CFG_ENV_IS_EMBEDDED + +/*----------------------------------------------------------------------- + * FLASH organization + */ +#define CFG_FLASH_BASE CFG_CS0_BASE +#define CFG_FLASH0_BASE CFG_CS0_BASE +#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x8000) +#define CFG_ENV_SECT_SIZE 0x8000 + +#define CFG_FLASH_CFI +#ifdef CFG_FLASH_CFI + +# define CFG_FLASH_CFI_DRIVER 1 +# define CFG_FLASH_SIZE 0x1000000 /* Max size that the board might have */ +# define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT +# define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ +# define CFG_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ +# define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ +# define CFG_FLASH_CHECKSUM +#endif + +/* + * This is setting for JFFS2 support in u-boot. + * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support. + */ +#ifdef CONFIG_CMD_JFFS2 +# define CONFIG_JFFS2_DEV "nor0" +# define CONFIG_JFFS2_PART_SIZE (0x01000000 - 0x40000) +# define CONFIG_JFFS2_PART_OFFSET (CFG_FLASH0_BASE + 0x40000) +#endif + +/*----------------------------------------------------------------------- + * Cache Configuration + */ +#define CFG_CACHELINE_SIZE 16 + +/*----------------------------------------------------------------------- + * Memory bank definitions + */ +/* + * CS0 - NOR Flash + * CS1 - Available + * CS2 - Available + * CS3 - Available + * CS4 - Available + * CS5 - Available + */ + +#define CFG_CS0_BASE 0x00000000 +#define CFG_CS0_MASK 0x00FF0001 +#define CFG_CS0_CTRL 0x00001FA0 + +#endif /* _M52277EVB_H */ diff --git a/lib_m68k/board.c b/lib_m68k/board.c index 43f97c404..915920641 100644 --- a/lib_m68k/board.c +++ b/lib_m68k/board.c @@ -313,6 +313,16 @@ board_init_f (ulong bootflag) debug ("Reserving %ldk for protected RAM at %08lx\n", reg, addr); #endif /* CONFIG_PRAM */ + /* round down to next 4 kB limit */ + addr &= ~(4096 - 1); + debug ("Top of RAM usable for U-Boot at: %08lx\n", addr); + +#ifdef CONFIG_LCD + /* reserve memory for LCD display (always full pages) */ + addr = lcd_setmem (addr); + gd->fb_base = addr; +#endif /* CONFIG_LCD */ + /* * reserve memory for U-Boot code, data & bss * round down to next 4 kB limit -- cgit v1.2.3 From 57a127201eb3d8cc19170a008e0bd7af608bd72f Mon Sep 17 00:00:00 2001 From: TsiChungLiew Date: Tue, 15 Jan 2008 14:15:46 -0600 Subject: ColdFire: MCF547x_8x - Add M5475EVB and M5485EVB support Signed-off-by: TsiChungLiew Signed-off by: John Rigby --- CREDITS | 2 +- MAINTAINERS | 2 + MAKEALL | 2 + Makefile | 71 +++++++++++ README | 1 + doc/README.m5475evb | 279 ++++++++++++++++++++++++++++++++++++++++ include/configs/M5475EVB.h | 311 +++++++++++++++++++++++++++++++++++++++++++++ include/configs/M5485EVB.h | 296 ++++++++++++++++++++++++++++++++++++++++++ 8 files changed, 963 insertions(+), 1 deletion(-) create mode 100644 doc/README.m5475evb create mode 100644 include/configs/M5475EVB.h create mode 100644 include/configs/M5485EVB.h (limited to 'MAKEALL') diff --git a/CREDITS b/CREDITS index edf825c70..57a82d2dc 100644 --- a/CREDITS +++ b/CREDITS @@ -290,7 +290,7 @@ W: http://www.leox.org N: TsiChung Liew E: Tsi-Chung.Liew@freescale.com -D: Support for ColdFire MCF523x, MCF532x, MCF5445x +D: Support for ColdFire MCF523x, MCF532x, MCF5445x, MCF547x_8x W: www.freescale.com N: Leif Lindholm diff --git a/MAINTAINERS b/MAINTAINERS index 3d35b3e1d..bd30f09f7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -652,6 +652,8 @@ TsiChung Liew M5329EVB mcf532x M5373EVB mcf532x M54455EVB mcf5445x + M5475EVB mcf547x_8x + M5485EVB mcf547x_8x Hayden Fraser diff --git a/MAKEALL b/MAKEALL index 744fd9b72..5f1be83fb 100755 --- a/MAKEALL +++ b/MAKEALL @@ -653,6 +653,8 @@ LIST_coldfire=" \ M5329AFEE \ M5373EVB \ M54455EVB \ + M5475AFE \ + M5485AFE \ r5200 \ TASREG \ " diff --git a/Makefile b/Makefile index a672f3a35..953c6bbad 100644 --- a/Makefile +++ b/Makefile @@ -218,6 +218,7 @@ LIBS += net/libnet.a LIBS += disk/libdisk.a LIBS += drivers/bios_emulator/libatibiosemu.a LIBS += drivers/block/libblock.a +LIBS += drivers/dma/libdma.a LIBS += drivers/hwmon/libhwmon.a LIBS += drivers/i2c/libi2c.a LIBS += drivers/input/libinput.a @@ -1856,6 +1857,76 @@ M54455EVB_i66_config : unconfig $(XECHO) "... with $${FREQ}Hz input clock" @$(MKCONFIG) -a M54455EVB m68k mcf5445x m54455evb freescale +M5475AFE_config \ +M5475BFE_config \ +M5475CFE_config \ +M5475DFE_config \ +M5475EFE_config \ +M5475FFE_config \ +M5475GFE_config : unconfig + @case "$@" in \ + M5475AFE_config) BOOT=2;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \ + M5475BFE_config) BOOT=2;CODE=16;VID=0;USB=0;RAM=64;RAM1=0;; \ + M5475CFE_config) BOOT=2;CODE=16;VID=1;USB=1;RAM=64;RAM1=0;; \ + M5475DFE_config) BOOT=2;CODE=0;VID=0;USB=1;RAM=64;RAM1=0;; \ + M5475EFE_config) BOOT=2;CODE=0;VID=1;USB=1;RAM=64;RAM1=0;; \ + M5475FFE_config) BOOT=2;CODE=32;VID=1;USB=1;RAM=64;RAM1=64;; \ + M5475GFE_config) BOOT=4;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \ + esac; \ + >include/config.h ; \ + echo "#define CFG_BUSCLK 133333333" > $(obj)include/config.h ; \ + echo "#define CFG_BOOTSZ $${BOOT}" >> $(obj)include/config.h ; \ + echo "#define CFG_DRAMSZ $${RAM}" >> $(obj)include/config.h ; \ + if [ "$${RAM1}" != "0" ] ; then \ + echo "#define CFG_DRAMSZ1 $${RAM1}" >> $(obj)include/config.h ; \ + fi; \ + if [ "$${CODE}" != "0" ] ; then \ + echo "#define CFG_NOR1SZ $${CODE}" >> $(obj)include/config.h ; \ + fi; \ + if [ "$${VID}" == "1" ] ; then \ + echo "#define CFG_VIDEO" >> $(obj)include/config.h ; \ + fi; \ + if [ "$${USB}" == "1" ] ; then \ + echo "#define CFG_USBCTRL" >> $(obj)include/config.h ; \ + fi + @$(MKCONFIG) -a M5475EVB m68k mcf547x_8x m547xevb freescale + +M5485AFE_config \ +M5485BFE_config \ +M5485CFE_config \ +M5485DFE_config \ +M5485EFE_config \ +M5485FFE_config \ +M5485GFE_config \ +M5485HFE_config : unconfig + @case "$@" in \ + M5485AFE_config) BOOT=2;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \ + M5485BFE_config) BOOT=2;CODE=16;VID=0;USB=0;RAM=64;RAM1=0;; \ + M5485CFE_config) BOOT=2;CODE=16;VID=1;USB=1;RAM=64;RAM1=0;; \ + M5485DFE_config) BOOT=2;CODE=0;VID=0;USB=1;RAM=64;RAM1=0;; \ + M5485EFE_config) BOOT=2;CODE=0;VID=1;USB=1;RAM=64;RAM1=0;; \ + M5485FFE_config) BOOT=2;CODE=32;VID=1;USB=1;RAM=64;RAM1=64;; \ + M5485GFE_config) BOOT=4;CODE=0;VID=0;USB=0;RAM=64;RAM1=0;; \ + M5485HFE_config) BOOT=2;CODE=;VID=1;USB=0;RAM=64;RAM1=0;; \ + esac; \ + >include/config.h ; \ + echo "#define CFG_BUSCLK 100000000" > $(obj)include/config.h ; \ + echo "#define CFG_BOOTSZ $${BOOT}" >> $(obj)include/config.h ; \ + echo "#define CFG_DRAMSZ $${RAM}" >> $(obj)include/config.h ; \ + if [ "$${RAM1}" != "0" ] ; then \ + echo "#define CFG_DRAMSZ1 $${RAM1}" >> $(obj)include/config.h ; \ + fi; \ + if [ "$${CODE}" != "0" ] ; then \ + echo "#define CFG_NOR1SZ $${CODE}" >> $(obj)include/config.h ; \ + fi; \ + if [ "$${VID}" == "1" ] ; then \ + echo "#define CFG_VIDEO" >> $(obj)include/config.h ; \ + fi; \ + if [ "$${USB}" == "1" ] ; then \ + echo "#define CFG_USBCTRL" >> $(obj)include/config.h ; \ + fi + @$(MKCONFIG) -a M5485EVB m68k mcf547x_8x m548xevb freescale + ######################################################################### ## MPC83xx Systems ######################################################################### diff --git a/README b/README index 09dda5376..fc404202a 100644 --- a/README +++ b/README @@ -139,6 +139,7 @@ Directory Hierarchy: - mcf5227x Files specific to Freescale ColdFire MCF5227x CPUs - mcf532x Files specific to Freescale ColdFire MCF5329 CPUs - mcf5445x Files specific to Freescale ColdFire MCF5445x CPUs + - mcf547x_8x Files specific to Freescale ColdFire MCF547x_8x CPUs - mips Files specific to MIPS CPUs - mpc5xx Files specific to Freescale MPC5xx CPUs - mpc5xxx Files specific to Freescale MPC5xxx CPUs diff --git a/doc/README.m5475evb b/doc/README.m5475evb new file mode 100644 index 000000000..cec4fd043 --- /dev/null +++ b/doc/README.m5475evb @@ -0,0 +1,279 @@ +Freescale MCF5475EVB ColdFire Development Board +================================================ + +TsiChung Liew(Tsi-Chung.Liew@freescale.com) +Created Jan 08, 2008 +=========================================== + + +Changed files: +============== + +- board/freescale/m547xevb/m547xevb.c Dram setup, IDE pre init, and PCI init +- board/freescale/m547xevb/mii.c MII init +- board/freescale/m547xevb/Makefile Makefile +- board/freescale/m547xevb/config.mk config make +- board/freescale/m547xevb/u-boot.lds Linker description + +- cpu/mcf547x_8x/cpu.c cpu specific code +- cpu/mcf547x_8x/cpu_init.c Flexbus ChipSelect, Mux pins setup, icache and RTC extra regs +- cpu/mcf547x_8x/interrupts.c cpu specific interrupt support +- cpu/mcf547x_8x/slicetimer.c Timer support +- cpu/mcf547x_8x/speed.c system, pci, flexbus, and cpu clock +- cpu/mcf547x_8x/Makefile Makefile +- cpu/mcf547x_8x/config.mk config make +- cpu/mcf547x_8x/start.S start up assembly code + +- doc/README.m5475evb This readme file + +- drivers/dma/MCD_dmaApi.c DMA API functions +- drivers/dma/MCD_tasks.c DMA Tasks +- drivers/dma/MCD_tasksInit.c DMA Tasks Init +- drivers/net/fsl_mcdmafec.c ColdFire common DMA FEC driver +- drivers/serial/mcfuart.c ColdFire common UART driver + +- include/MCD_dma.h DMA header file +- include/MCD_progCheck.h DMA header file +- include/MCD_tasksInit.h DMA header file +- include/asm-m68k/bitops.h Bit operation function export +- include/asm-m68k/byteorder.h Byte order functions +- include/asm-m68k/errno.h Error Number definition +- include/asm-m68k/fec.h FEC structure and definition +- include/asm-m68k/fsl_i2c.h I2C structure and definition +- include/asm-m68k/fsl_mcddmafec.h DMA FEC structure and definition +- include/asm-m68k/global_data.h Global data structure +- include/asm-m68k/immap.h ColdFire specific header file and driver macros +- include/asm-m68k/immap_547x_8x.h mcf547x_8x specific header file +- include/asm-m68k/io.h io functions +- include/asm-m68k/m547x_8x.h mcf547x_8x specific header file +- include/asm-m68k/posix_types.h Posix +- include/asm-m68k/processor.h header file +- include/asm-m68k/ptrace.h Exception structure +- include/asm-m68k/rtc.h Realtime clock header file +- include/asm-m68k/string.h String function export +- include/asm-m68k/timer.h Timer structure and definition +- include/asm-m68k/types.h Data types definition +- include/asm-m68k/uart.h Uart structure and definition +- include/asm-m68k/u-boot.h u-boot structure + +- include/configs/M5475EVB.h Board specific configuration file + +- lib_m68k/board.c board init function +- lib_m68k/cache.c +- lib_m68k/interrupts Coldfire common interrupt functions +- lib_m68k/m68k_linux.c +- lib_m68k/traps.c Exception init code + +1 MCF547x specific Options/Settings +==================================== +1.1 pre-loader is no longer suppoer in thie coldfire family + +1.2 Configuration settings for M5475EVB Development Board +CONFIG_MCF547x_8x -- define for all MCF547x_8x CPUs +CONFIG_M547x -- define for all Freescale MCF547x CPUs +CONFIG_M5475 -- define for M5475EVB board + +CONFIG_MCFUART -- define to use common CF Uart driver +CFG_UART_PORT -- define UART port number, start with 0, 1 and 2 +CONFIG_BAUDRATE -- define UART baudrate + +CONFIG_FSLDMAFEC -- define to use common dma FEC driver +CONFIG_NET_MULTI -- define to use multi FEC in u-boot +CONFIG_MII -- enable to use MII driver +CONFIG_CF_DOMII -- enable to use MII feature in cmd_mii.c +CFG_DISCOVER_PHY -- enable PHY discovery +CFG_RX_ETH_BUFFER -- Set FEC Receive buffer +CFG_FAULT_ECHO_LINK_DOWN-- +CFG_FEC0_PINMUX -- Set FEC0 Pin configuration +CFG_FEC1_PINMUX -- Set FEC1 Pin configuration +CFG_FEC0_MIIBASE -- Set FEC0 MII base register +CFG_FEC1_MIIBASE -- Set FEC0 MII base register +MCFFEC_TOUT_LOOP -- set FEC timeout loop +CONFIG_HAS_ETH1 -- define to enable second FEC in u-boot + +CONFIG_CMD_USB -- enable USB commands +CONFIG_USB_OHCI_NEW -- enable USB OHCI driver +CONFIG_USB_STORAGE -- enable USB Storage device +CONFIG_DOS_PARTITION -- enable DOS read/write + +CONFIG_SLTTMR -- define to use SLT timer + +CONFIG_FSL_I2C -- define to use FSL common I2C driver +CONFIG_HARD_I2C -- define for I2C hardware support +CONFIG_SOFT_I2C -- define for I2C bit-banged +CFG_I2C_SPEED -- define for I2C speed +CFG_I2C_SLAVE -- define for I2C slave address +CFG_I2C_OFFSET -- define for I2C base address offset +CFG_IMMR -- define for MBAR offset + +CONFIG_PCI -- define for PCI support +CONFIG_PCI_PNP -- define for Plug n play support +CONFIG_SKIPPCI_HOSTBRIDGE -- SKIP PCI Host bridge +CFG_PCI_MEM_BUS -- PCI memory logical offset +CFG_PCI_MEM_PHYS -- PCI memory physical offset +CFG_PCI_MEM_SIZE -- PCI memory size +CFG_PCI_IO_BUS -- PCI IO logical offset +CFG_PCI_IO_PHYS -- PCI IO physical offset +CFG_PCI_IO_SIZE -- PCI IO size +CFG_PCI_CFG_BUS -- PCI Configuration logical offset +CFG_PCI_CFG_PHYS -- PCI Configuration physical offset +CFG_PCI_CFG_SIZE -- PCI Configuration size + +CFG_MBAR -- define MBAR offset + +CONFIG_MONITOR_IS_IN_RAM -- Not support + +CFG_INIT_RAM_ADDR -- defines the base address of the MCF547x internal SRAM + +CFG_CSn_BASE -- defines the Chip Select Base register +CFG_CSn_MASK -- defines the Chip Select Mask register +CFG_CSn_CTRL -- defines the Chip Select Control register + +CFG_SDRAM_BASE -- defines the DRAM Base + +2. MEMORY MAP UNDER U-BOOT AND LINUX KERNEL +=========================================== +2.1. System memory map: + Flash: 0xFF800000-0xFFFFFFFF (8MB) + DDR: 0x00000000-0x3FFFFFFF (1024MB) + SRAM: 0xF2000000-0xF2000FFF (4KB) + PCI: 0x70000000-0x8FFFFFFF (512MB) + IP: 0xF0000000-0xFFFFFFFF (256MB) + +3. COMPILATION +============== +3.1 To create U-Boot the gcc-4.x compiler set (ColdFire ELF or uclinux + version) from codesourcery.com was used. Download it from: + http://www.codesourcery.com/gnu_toolchains/coldfire/download.html + +3.2 Compilation + export CROSS_COMPILE=cross-compile-prefix + cd u-boot-1.x.x + make distclean + make M5475AFE_config, or - boot 2MB, RAM 64MB + make M5475BFE_config, or - boot 2MB, code 16MB, RAM 64MB + make M5475CFE_config, or - boot 2MB, code 16MB, Video, USB, RAM 64MB + make M5475DFE_config, or - boot 2MB, USB, RAM 64MB + make M5475EFE_config, or - boot 2MB, Video, USB, RAM 64MB + make M5475FFE_config, or - boot 2MB, code 32MB, Video, USB, RAM 128MB + make M5475GFE_config, or - boot 2MB, RAM 64MB + make + +5. SCREEN DUMP +============== +5.1 + +U-Boot 1.3.1 (Jan 8 2008 - 12:47:44) + +CPU: Freescale MCF5475 + CPU CLK 266 Mhz BUS CLK 133 Mhz +Board: Freescale FireEngine 5475 EVB +I2C: ready +DRAM: 64 MB +FLASH: 18 MB +In: serial +Out: serial +Err: serial +Net: FEC0, FEC1 +-> pri +bootdelay=1 +baudrate=115200 +ethaddr=00:e0:0c:bc:e5:60 +eth1addr=00:e0:0c:bc:e5:61 +ipaddr=192.162.1.2 +serverip=192.162.1.1 +gatewayip=192.162.1.1 +netmask=255.255.255.0 +hostname=M547xEVB +netdev=eth0 +loadaddr=10000 +u-boot=u-boot.bin +load=tftp ${loadaddr) ${u-boot} +upd=run load; run prog +prog=prot off bank 1;era ff800000 ff82ffff;cp.b ${loadaddr} ff800000 ${filesize};save +stdin=serial +stdout=serial +stderr=serial +ethact=FEC0 +mem=65024k + +Environment size: 433/8188 bytes +-> bdin +memstart = 0x00000000 +memsize = 0x04000000 +flashstart = 0xFF800000 +flashsize = 0x01200000 +flashoffset = 0x00000000 +sramstart = 0xF2000000 +sramsize = 0x00001000 +mbar = 0xF0000000 +busfreq = 133.333 MHz +pcifreq = 0 MHz +ethaddr = 00:E0:0C:BC:E5:60 +eth1addr = 00:E0:0C:BC:E5:61 +ip_addr = 192.162.1.2 +baudrate = 115200 bps +-> ? +? - alias for 'help' +autoscr - run script from memory +base - print or set address offset +bdinfo - print Board Info structure +boot - boot default, i.e., run 'bootcmd' +bootd - boot default, i.e., run 'bootcmd' +bootelf - Boot from an ELF image in memory +bootm - boot application image from memory +bootp - boot image via network using BootP/TFTP protocol +bootvx - Boot vxWorks from an ELF image +cmp - memory compare +coninfo - print console devices and information +cp - memory copy +crc32 - checksum calculation +dcache - enable or disable data cache +echo - echo args to console +erase - erase FLASH memory +flinfo - print FLASH memory information +go - start application at address 'addr' +help - print online help +icache - enable or disable instruction cache +icrc32 - checksum calculation +iloop - infinite loop on address range +imd - i2c memory display +iminfo - print header information for application image +imls - list all images found in flash +imm - i2c memory modify (auto-incrementing) +imw - memory write (fill) +inm - memory modify (constant address) +iprobe - probe to discover valid I2C chip addresses +itest - return true/false on integer compare +loadb - load binary file over serial line (kermit mode) +loads - load S-Record file over serial line +loady - load binary file over serial line (ymodem mode) +loop - infinite loop on address range +md - memory display +mii - MII utility commands +mm - memory modify (auto-incrementing) +mtest - simple RAM test +mw - memory write (fill) +nfs - boot image via network using NFS protocol +nm - memory modify (constant address) +pci - list and access PCI Configuration Space +ping - send ICMP ECHO_REQUEST to network host +printenv- print environment variables +protect - enable or disable FLASH write protection +rarpboot- boot image via network using RARP/TFTP protocol +reset - Perform RESET of the CPU +run - run commands in an environment variable +saveenv - save environment variables to persistent storage +setenv - set environment variables +sleep - delay execution for some time +tftpboot- boot image via network using TFTP protocol +usb - USB sub-system +usbboot - boot from USB device +version - print monitor version +-> usb start +(Re)start USB... +USB: OHCI pci controller (1131, 1561) found @(0:17:0) +OHCI regs address 0x80000000 +scanning bus for devices... 2 USB Device(s) found + scanning bus for storage devices... 1 Storage Device(s) found +-> diff --git a/include/configs/M5475EVB.h b/include/configs/M5475EVB.h new file mode 100644 index 000000000..84c2105d5 --- /dev/null +++ b/include/configs/M5475EVB.h @@ -0,0 +1,311 @@ +/* + * Configuation settings for the Freescale MCF5475 board. + * + * Copyright (C) 2004-2008 Freescale Semiconductor, Inc. + * TsiChung Liew (Tsi-Chung.Liew@freescale.com) + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * board/config.h - configuration options, board specific + */ + +#ifndef _M5475EVB_H +#define _M5475EVB_H + +/* + * High Level Configuration Options + * (easy to change) + */ +#define CONFIG_MCF547x_8x /* define processor family */ +#define CONFIG_M547x /* define processor type */ +#define CONFIG_M5475 /* define processor type */ + +#undef DEBUG + +#define CONFIG_MCFUART +#define CFG_UART_PORT (0) +#define CONFIG_BAUDRATE 115200 +#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } + +#define CONFIG_HW_WATCHDOG +#define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */ + +/* Command line configuration */ +#include + +#define CONFIG_CMD_CACHE +#undef CONFIG_CMD_DATE +#define CONFIG_CMD_ELF +#define CONFIG_CMD_FLASH +#define CONFIG_CMD_I2C +#define CONFIG_CMD_MEMORY +#define CONFIG_CMD_MISC +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_CMD_PCI +#define CONFIG_CMD_PING +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_USB + +#define CONFIG_SLTTMR + +#define CONFIG_FSLDMAFEC +#ifdef CONFIG_FSLDMAFEC +# define CONFIG_NET_MULTI 1 +# define CONFIG_MII 1 +# define CONFIG_HAS_ETH1 + +# define CFG_DISCOVER_PHY +# define CFG_RX_ETH_BUFFER 32 +# define CFG_TX_ETH_BUFFER 48 +# define CFG_FAULT_ECHO_LINK_DOWN + +# define CFG_FEC0_PINMUX 0 +# define CFG_FEC0_MIIBASE CFG_FEC0_IOBASE +# define CFG_FEC1_PINMUX 0 +# define CFG_FEC1_MIIBASE CFG_FEC0_IOBASE + +# define MCFFEC_TOUT_LOOP 50000 +/* If CFG_DISCOVER_PHY is not defined - hardcoded */ +# ifndef CFG_DISCOVER_PHY +# define FECDUPLEX FULL +# define FECSPEED _100BASET +# else +# ifndef CFG_FAULT_ECHO_LINK_DOWN +# define CFG_FAULT_ECHO_LINK_DOWN +# endif +# endif /* CFG_DISCOVER_PHY */ + +# define CONFIG_ETHADDR 00:e0:0c:bc:e5:60 +# define CONFIG_ETH1ADDR 00:e0:0c:bc:e5:61 +# define CONFIG_IPADDR 192.162.1.2 +# define CONFIG_NETMASK 255.255.255.0 +# define CONFIG_SERVERIP 192.162.1.1 +# define CONFIG_GATEWAYIP 192.162.1.1 +# define CONFIG_OVERWRITE_ETHADDR_ONCE + +#endif + +#ifdef CONFIG_CMD_USB +# define CONFIG_USB_OHCI_NEW +# define CONFIG_USB_STORAGE + +# ifndef CONFIG_CMD_PCI +# define CONFIG_CMD_PCI +# endif +# define CONFIG_PCI_OHCI +# define CONFIG_DOS_PARTITION + +# undef CFG_USB_OHCI_BOARD_INIT +# undef CFG_USB_OHCI_CPU_INIT +# define CFG_USB_OHCI_MAX_ROOT_PORTS 15 +# define CFG_USB_OHCI_SLOT_NAME "isp1561" +# define CFG_OHCI_SWAP_REG_ACCESS +#endif + +/* I2C */ +#define CONFIG_FSL_I2C +#define CONFIG_HARD_I2C /* I2C with hw support */ +#undef CONFIG_SOFT_I2C /* I2C bit-banged */ +#define CFG_I2C_SPEED 80000 +#define CFG_I2C_SLAVE 0x7F +#define CFG_I2C_OFFSET 0x00008F00 +#define CFG_IMMR CFG_MBAR + +/* PCI */ +#ifdef CONFIG_CMD_PCI +#define CONFIG_PCI 1 +#define CONFIG_PCI_PNP 1 +#define CONFIG_SKIPPCI_HOSTBRIDGE + +#define CFG_PCI_CACHE_LINE_SIZE 8 + +#define CFG_PCI_MEM_BUS 0x80000000 +#define CFG_PCI_MEM_PHYS CFG_PCI_MEM_BUS +#define CFG_PCI_MEM_SIZE 0x10000000 + +#define CFG_PCI_IO_BUS 0x71000000 +#define CFG_PCI_IO_PHYS CFG_PCI_IO_BUS +#define CFG_PCI_IO_SIZE 0x01000000 + +#define CFG_PCI_CFG_BUS 0x70000000 +#define CFG_PCI_CFG_PHYS CFG_PCI_CFG_BUS +#define CFG_PCI_CFG_SIZE 0x01000000 +#endif + +#define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */ +#define CONFIG_UDP_CHECKSUM + +#ifdef CONFIG_MCFFEC +# define CONFIG_ETHADDR 00:e0:0c:bc:e5:60 +# define CONFIG_IPADDR 192.162.1.2 +# define CONFIG_NETMASK 255.255.255.0 +# define CONFIG_SERVERIP 192.162.1.1 +# define CONFIG_GATEWAYIP 192.162.1.1 +# define CONFIG_OVERWRITE_ETHADDR_ONCE +#endif /* FEC_ENET */ + +#define CONFIG_HOSTNAME M547xEVB +#define CONFIG_EXTRA_ENV_SETTINGS \ + "netdev=eth0\0" \ + "loadaddr=10000\0" \ + "u-boot=u-boot.bin\0" \ + "load=tftp ${loadaddr) ${u-boot}\0" \ + "upd=run load; run prog\0" \ + "prog=prot off bank 1;" \ + "era ff800000 ff82ffff;" \ + "cp.b ${loadaddr} ff800000 ${filesize};"\ + "save\0" \ + "" + +#define CONFIG_PRAM 512 /* 512 KB */ +#define CFG_PROMPT "-> " +#define CFG_LONGHELP /* undef to save memory */ + +#ifdef CONFIG_CMD_KGDB +# define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ +#else +# define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#endif + +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ +#define CFG_LOAD_ADDR 0x00010000 + +#define CFG_HZ 1000 +#define CFG_CLK CFG_BUSCLK +#define CFG_CPU_CLK CFG_CLK * 2 + +#define CFG_MBAR 0xF0000000 +#define CFG_INTSRAM (CFG_MBAR + 0x10000) +#define CFG_INTSRAMSZ 0x8000 + +/*#define CFG_LATCH_ADDR (CFG_CS1_BASE + 0x80000)*/ + +/* + * Low Level Configuration Settings + * (address mappings, register initial values, etc.) + * You should know what you are doing if you make changes here. + */ +/*----------------------------------------------------------------------- + * Definitions for initial stack pointer and data area (in DPRAM) + */ +#define CFG_INIT_RAM_ADDR 0xF2000000 +#define CFG_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */ +#define CFG_INIT_RAM_CTRL 0x21 +#define CFG_INIT_RAM1_ADDR (CFG_INIT_RAM_ADDR + CFG_INIT_RAM_END) +#define CFG_INIT_RAM1_END 0x1000 /* End of used area in internal SRAM */ +#define CFG_INIT_RAM1_CTRL 0x21 +#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ +#define CFG_GBL_DATA_OFFSET ((CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) - 0x10) +#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET + +/*----------------------------------------------------------------------- + * Start addresses for the final memory configuration + * (Set up by the startup code) + * Please note that CFG_SDRAM_BASE _must_ start at 0 + */ +#define CFG_SDRAM_BASE 0x00000000 +#define CFG_SDRAM_CFG1 0x73711630 +#define CFG_SDRAM_CFG2 0x46370000 +#define CFG_SDRAM_CTRL 0xE10B0000 +#define CFG_SDRAM_EMOD 0x40010000 +#define CFG_SDRAM_MODE 0x018D0000 +#define CFG_SDRAM_DRVSTRENGTH 0x000002AA +#ifdef CFG_DRAMSZ1 +# define CFG_SDRAM_SIZE (CFG_DRAMSZ + CFG_DRAMSZ1) +#else +# define CFG_SDRAM_SIZE CFG_DRAMSZ +#endif + +#define CFG_MEMTEST_START CFG_SDRAM_BASE + 0x400 +#define CFG_MEMTEST_END ((CFG_SDRAM_SIZE - 3) << 20) + +#define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400) +#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ + +#define CFG_BOOTPARAMS_LEN 64*1024 +#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ + +/* + * For booting Linux, the board info and command line data + * have to be in the first 8 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization ?? + */ +#define CFG_BOOTMAPSZ (CFG_SDRAM_BASE + (CFG_SDRAM_SIZE << 20)) + +/*----------------------------------------------------------------------- + * FLASH organization + */ +#define CFG_FLASH_CFI +#ifdef CFG_FLASH_CFI +# define CFG_FLASH_BASE (CFG_CS0_BASE) +# define CFG_FLASH_CFI_DRIVER 1 +# define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT +# define CFG_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ +# define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ +# define CFG_FLASH_USE_BUFFER_WRITE +#ifdef CFG_NOR1SZ +# define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */ +# define CFG_FLASH_SIZE ((CFG_NOR1SZ + CFG_BOOTSZ) << 20) +# define CFG_FLASH_BANKS_LIST { CFG_CS0_BASE, CFG_CS1_BASE } +#else +# define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ +# define CFG_FLASH_SIZE (CFG_BOOTSZ << 20) +#endif +#endif + +/* Configuration for environment + * Environment is embedded in u-boot in the second sector of the flash + */ +#define CFG_ENV_OFFSET 0x2000 +#define CFG_ENV_SECT_SIZE 0x2000 +#define CFG_ENV_IS_IN_FLASH 1 +#define CFG_ENV_IS_EMBEDDED 1 + +/*----------------------------------------------------------------------- + * Cache Configuration + */ +#define CFG_CACHELINE_SIZE 16 + +/*----------------------------------------------------------------------- + * Chipselect bank definitions + */ +/* + * CS0 - NOR Flash 1, 2, 4, or 8MB + * CS1 - NOR Flash + * CS2 - Available + * CS3 - Available + * CS4 - Available + * CS5 - Available + */ +#define CFG_CS0_BASE 0xFF800000 +#define CFG_CS0_MASK (((CFG_BOOTSZ << 20) - 1) & 0xFFFF0001) +#define CFG_CS0_CTRL 0x00101980 + +#ifdef CFG_NOR1SZ +#define CFG_CS1_BASE 0xF8000000 +#define CFG_CS1_MASK (((CFG_NOR1SZ << 20) - 1) & 0xFFFF0001) +#define CFG_CS1_CTRL 0x00000D80 +#endif + +#endif /* _M5475EVB_H */ diff --git a/include/configs/M5485EVB.h b/include/configs/M5485EVB.h new file mode 100644 index 000000000..e9e5ee91c --- /dev/null +++ b/include/configs/M5485EVB.h @@ -0,0 +1,296 @@ +/* + * Configuation settings for the Freescale MCF5485 FireEngine board. + * + * Copyright (C) 2004-2008 Freescale Semiconductor, Inc. + * TsiChung Liew (Tsi-Chung.Liew@freescale.com) + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * board/config.h - configuration options, board specific + */ + +#ifndef _M5485EVB_H +#define _M5485EVB_H + +/* + * High Level Configuration Options + * (easy to change) + */ +#define CONFIG_MCF547x_8x /* define processor family */ +#define CONFIG_M548x /* define processor type */ +#define CONFIG_M5485 /* define processor type */ + +#undef DEBUG + +#define CONFIG_MCFUART +#define CFG_UART_PORT (0) +#define CONFIG_BAUDRATE 115200 +#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } + +#define CONFIG_HW_WATCHDOG +#define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */ + +/* Command line configuration */ +#include + +#define CONFIG_CMD_CACHE +#undef CONFIG_CMD_DATE +#define CONFIG_CMD_ELF +#define CONFIG_CMD_FLASH +#define CONFIG_CMD_I2C +#define CONFIG_CMD_MEMORY +#define CONFIG_CMD_MISC +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_CMD_PCI +#define CONFIG_CMD_PING +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_USB + +#define CONFIG_SLTTMR + +#define CONFIG_FSLDMAFEC +#ifdef CONFIG_FSLDMAFEC +# define CONFIG_NET_MULTI 1 +# define CONFIG_MII 1 +# define CONFIG_HAS_ETH1 + +# define CFG_DISCOVER_PHY +# define CFG_RX_ETH_BUFFER 32 +# define CFG_TX_ETH_BUFFER 48 +# define CFG_FAULT_ECHO_LINK_DOWN + +# define CFG_FEC0_PINMUX 0 +# define CFG_FEC0_MIIBASE CFG_FEC0_IOBASE +# define CFG_FEC1_PINMUX 0 +# define CFG_FEC1_MIIBASE CFG_FEC0_IOBASE + +# define MCFFEC_TOUT_LOOP 50000 +/* If CFG_DISCOVER_PHY is not defined - hardcoded */ +# ifndef CFG_DISCOVER_PHY +# define FECDUPLEX FULL +# define FECSPEED _100BASET +# else +# ifndef CFG_FAULT_ECHO_LINK_DOWN +# define CFG_FAULT_ECHO_LINK_DOWN +# endif +# endif /* CFG_DISCOVER_PHY */ + +# define CONFIG_ETHADDR 00:e0:0c:bc:e5:60 +# define CONFIG_ETH1ADDR 00:e0:0c:bc:e5:61 +# define CONFIG_IPADDR 192.162.1.2 +# define CONFIG_NETMASK 255.255.255.0 +# define CONFIG_SERVERIP 192.162.1.1 +# define CONFIG_GATEWAYIP 192.162.1.1 +# define CONFIG_OVERWRITE_ETHADDR_ONCE + +#endif + +#ifdef CONFIG_CMD_USB +# define CONFIG_USB_STORAGE +# define CONFIG_DOS_PARTITION +# define CONFIG_USB_OHCI_NEW +# ifndef CONFIG_CMD_PCI +# define CONFIG_CMD_PCI +# endif +/*# define CONFIG_PCI_OHCI*/ +# define CFG_USB_OHCI_REGS_BASE 0x80041000 +# define CFG_USB_OHCI_MAX_ROOT_PORTS 15 +# define CFG_USB_OHCI_SLOT_NAME "isp1561" +# define CFG_OHCI_SWAP_REG_ACCESS +#endif + +/* I2C */ +#define CONFIG_FSL_I2C +#define CONFIG_HARD_I2C /* I2C with hw support */ +#undef CONFIG_SOFT_I2C /* I2C bit-banged */ +#define CFG_I2C_SPEED 80000 +#define CFG_I2C_SLAVE 0x7F +#define CFG_I2C_OFFSET 0x00008F00 +#define CFG_IMMR CFG_MBAR + +/* PCI */ +#ifdef CONFIG_CMD_PCI +#define CONFIG_PCI 1 +#define CONFIG_PCI_PNP 1 + +#define CFG_PCI_MEM_BUS 0x80000000 +#define CFG_PCI_MEM_PHYS CFG_PCI_MEM_BUS +#define CFG_PCI_MEM_SIZE 0x10000000 + +#define CFG_PCI_IO_BUS 0x71000000 +#define CFG_PCI_IO_PHYS CFG_PCI_IO_BUS +#define CFG_PCI_IO_SIZE 0x01000000 + +#define CFG_PCI_CFG_BUS 0x70000000 +#define CFG_PCI_CFG_PHYS CFG_PCI_CFG_BUS +#define CFG_PCI_CFG_SIZE 0x01000000 +#endif + +#define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */ +#define CONFIG_UDP_CHECKSUM + +#define CONFIG_HOSTNAME M548xEVB +#define CONFIG_EXTRA_ENV_SETTINGS \ + "netdev=eth0\0" \ + "loadaddr=10000\0" \ + "u-boot=u-boot.bin\0" \ + "load=tftp ${loadaddr) ${u-boot}\0" \ + "upd=run load; run prog\0" \ + "prog=prot off bank 1;" \ + "era ff800000 ff82ffff;" \ + "cp.b ${loadaddr} ff800000 ${filesize};"\ + "save\0" \ + "" + +#define CONFIG_PRAM 512 /* 512 KB */ +#define CFG_PROMPT "-> " +#define CFG_LONGHELP /* undef to save memory */ + +#ifdef CONFIG_CMD_KGDB +# define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ +#else +# define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#endif + +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ +#define CFG_LOAD_ADDR 0x00010000 + +#define CFG_HZ 1000 +#define CFG_CLK CFG_BUSCLK +#define CFG_CPU_CLK CFG_CLK * 2 + +#define CFG_MBAR 0xF0000000 +#define CFG_INTSRAM (CFG_MBAR + 0x10000) +#define CFG_INTSRAMSZ 0x8000 + +/*#define CFG_LATCH_ADDR (CFG_CS1_BASE + 0x80000)*/ + +/* + * Low Level Configuration Settings + * (address mappings, register initial values, etc.) + * You should know what you are doing if you make changes here. + */ +/*----------------------------------------------------------------------- + * Definitions for initial stack pointer and data area (in DPRAM) + */ +#define CFG_INIT_RAM_ADDR 0xF2000000 +#define CFG_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */ +#define CFG_INIT_RAM_CTRL 0x21 +#define CFG_INIT_RAM1_ADDR (CFG_INIT_RAM_ADDR + CFG_INIT_RAM_END) +#define CFG_INIT_RAM1_END 0x1000 /* End of used area in internal SRAM */ +#define CFG_INIT_RAM1_CTRL 0x21 +#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ +#define CFG_GBL_DATA_OFFSET ((CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) - 0x10) +#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET + +/*----------------------------------------------------------------------- + * Start addresses for the final memory configuration + * (Set up by the startup code) + * Please note that CFG_SDRAM_BASE _must_ start at 0 + */ +#define CFG_SDRAM_BASE 0x00000000 +#define CFG_SDRAM_CFG1 0x73711630 +#define CFG_SDRAM_CFG2 0x46370000 +#define CFG_SDRAM_CTRL 0xE10B0000 +#define CFG_SDRAM_EMOD 0x40010000 +#define CFG_SDRAM_MODE 0x018D0000 +#define CFG_SDRAM_DRVSTRENGTH 0x000002AA +#ifdef CFG_DRAMSZ1 +# define CFG_SDRAM_SIZE (CFG_DRAMSZ + CFG_DRAMSZ1) +#else +# define CFG_SDRAM_SIZE CFG_DRAMSZ +#endif + +#define CFG_MEMTEST_START CFG_SDRAM_BASE + 0x400 +#define CFG_MEMTEST_END ((CFG_SDRAM_SIZE - 3) << 20) + +#define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400) +#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ + +#define CFG_BOOTPARAMS_LEN 64*1024 +#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ + +/* + * For booting Linux, the board info and command line data + * have to be in the first 8 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization ?? + */ +#define CFG_BOOTMAPSZ (CFG_SDRAM_BASE + (CFG_SDRAM_SIZE << 20)) + +/*----------------------------------------------------------------------- + * FLASH organization + */ +#define CFG_FLASH_CFI +#ifdef CFG_FLASH_CFI +# define CFG_FLASH_BASE (CFG_CS0_BASE) +# define CFG_FLASH_CFI_DRIVER 1 +# define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT +# define CFG_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ +# define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ +# define CFG_FLASH_USE_BUFFER_WRITE +#ifdef CFG_NOR1SZ +# define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */ +# define CFG_FLASH_SIZE ((CFG_NOR1SZ + CFG_BOOTSZ) << 20) +# define CFG_FLASH_BANKS_LIST { CFG_CS0_BASE, CFG_CS1_BASE } +#else +# define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ +# define CFG_FLASH_SIZE (CFG_BOOTSZ << 20) +#endif +#endif + +/* Configuration for environment + * Environment is embedded in u-boot in the second sector of the flash + */ +#define CFG_ENV_OFFSET 0x2000 +#define CFG_ENV_SECT_SIZE 0x2000 +#define CFG_ENV_IS_IN_FLASH 1 +#define CFG_ENV_IS_EMBEDDED 1 + +/*----------------------------------------------------------------------- + * Cache Configuration + */ +#define CFG_CACHELINE_SIZE 16 + +/*----------------------------------------------------------------------- + * Chipselect bank definitions + */ +/* + * CS0 - NOR Flash 1, 2, 4, or 8MB + * CS1 - NOR Flash + * CS2 - Available + * CS3 - Available + * CS4 - Available + * CS5 - Available + */ +#define CFG_CS0_BASE 0xFF800000 +#define CFG_CS0_MASK (((CFG_BOOTSZ << 20) - 1) & 0xFFFF0001) +#define CFG_CS0_CTRL 0x00101980 + +#ifdef CFG_NOR1SZ +#define CFG_CS1_BASE 0xF8000000 +#define CFG_CS1_MASK (((CFG_NOR1SZ << 20) - 1) & 0xFFFF0001) +#define CFG_CS1_CTRL 0x00000D80 +#endif + +#endif /* _M5485EVB_H */ -- cgit v1.2.3