From b05e8bf58be9d8956fdfde3d8c8e87c140414663 Mon Sep 17 00:00:00 2001 From: "Lawrence R. Johnson" Date: Fri, 4 Jan 2008 02:11:56 -0500 Subject: ppc4xx: Use CFG_4xx_GPIO_TABLE to configure Sequoia board Note: this patch changes the configuration of some GPIO registers: Register Old Value New Value --------------- ---------- ---------- DCR GPIO0_TCR 0x0000000F 0x0000F0CF DCR GPIO0_TSRH 0x55005000 0x00000000 DCR GPIO1_TCR 0xC2000000 0xE2000000 DCR GPIO1_TSRL 0x0C000000 0x00200000 DCR GPIO1_ISR2L 0x00050000 0x00110000 Signed-off-by: Larry Johnson --- board/amcc/sequoia/sequoia.c | 31 +------------------------------ 1 file changed, 1 insertion(+), 30 deletions(-) (limited to 'board/amcc/sequoia') diff --git a/board/amcc/sequoia/sequoia.c b/board/amcc/sequoia/sequoia.c index 37b4f31b9..2268bc06b 100644 --- a/board/amcc/sequoia/sequoia.c +++ b/board/amcc/sequoia/sequoia.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include @@ -44,36 +45,6 @@ int board_early_init_f(void) mtdcr(ebccfga, xbcfg); mtdcr(ebccfgd, 0xb8400000); - /*-------------------------------------------------------------------- - * Setup the GPIO pins - *-------------------------------------------------------------------*/ - /* test-only: take GPIO init from pcs440ep ???? in config file */ - out_be32((u32 *) GPIO0_OR, 0x00000000); - out_be32((u32 *) GPIO0_TCR, 0x0000000f); - out_be32((u32 *) GPIO0_OSRL, 0x50015400); - out_be32((u32 *) GPIO0_OSRH, 0x550050aa); - out_be32((u32 *) GPIO0_TSRL, 0x50015400); - out_be32((u32 *) GPIO0_TSRH, 0x55005000); - out_be32((u32 *) GPIO0_ISR1L, 0x50000000); - out_be32((u32 *) GPIO0_ISR1H, 0x00000000); - out_be32((u32 *) GPIO0_ISR2L, 0x00000000); - out_be32((u32 *) GPIO0_ISR2H, 0x00000100); - out_be32((u32 *) GPIO0_ISR3L, 0x00000000); - out_be32((u32 *) GPIO0_ISR3H, 0x00000000); - - out_be32((u32 *) GPIO1_OR, 0x00000000); - out_be32((u32 *) GPIO1_TCR, 0xc2000000); - out_be32((u32 *) GPIO1_OSRL, 0x5c280000); - out_be32((u32 *) GPIO1_OSRH, 0x00000000); - out_be32((u32 *) GPIO1_TSRL, 0x0c000000); - out_be32((u32 *) GPIO1_TSRH, 0x00000000); - out_be32((u32 *) GPIO1_ISR1L, 0x00005550); - out_be32((u32 *) GPIO1_ISR1H, 0x00000000); - out_be32((u32 *) GPIO1_ISR2L, 0x00050000); - out_be32((u32 *) GPIO1_ISR2H, 0x00000000); - out_be32((u32 *) GPIO1_ISR3L, 0x01400000); - out_be32((u32 *) GPIO1_ISR3H, 0x00000000); - /*-------------------------------------------------------------------- * Setup the interrupt controller polarities, triggers, etc. *-------------------------------------------------------------------*/ -- cgit v1.2.3