From ddc922ff2c20ae0b7f9ce2df1ac28143e2f325bd Mon Sep 17 00:00:00 2001 From: Niklaus Giger Date: Sun, 4 Oct 2009 20:04:20 +0200 Subject: ppc_4xx: Apply new HW register names Modify all existing *.c files to use the new register names as seen in the AMCC manuals. Signed-off-by: Niklaus Giger Signed-off-by: Stefan Roese --- board/esd/du440/du440.c | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) (limited to 'board/esd/du440/du440.c') diff --git a/board/esd/du440/du440.c b/board/esd/du440/du440.c index 056f455d6..d0e52cbab 100644 --- a/board/esd/du440/du440.c +++ b/board/esd/du440/du440.c @@ -435,26 +435,26 @@ void pci_target_init(struct pci_controller *hose) * Use byte reversed out routines to handle endianess. * Make this region non-prefetchable. */ - out32r(PCIX0_PMM0MA, 0x00000000); /* PMM0 Mask/Attribute */ + out32r(PCIL0_PMM0MA, 0x00000000); /* PMM0 Mask/Attribute */ /* - disabled b4 setting */ - out32r(PCIX0_PMM0LA, CONFIG_SYS_PCI_MEMBASE); /* PMM0 Local Address */ - out32r(PCIX0_PMM0PCILA, CONFIG_SYS_PCI_MEMBASE); /* PMM0 PCI Low Address */ - out32r(PCIX0_PMM0PCIHA, 0x00000000); /* PMM0 PCI High Address */ - out32r(PCIX0_PMM0MA, 0xE0000001); /* 512M + No prefetching, */ + out32r(PCIL0_PMM0LA, CONFIG_SYS_PCI_MEMBASE); /* PMM0 Local Address */ + out32r(PCIL0_PMM0PCILA, CONFIG_SYS_PCI_MEMBASE); /* PMM0 PCI Low Address */ + out32r(PCIL0_PMM0PCIHA, 0x00000000); /* PMM0 PCI High Address */ + out32r(PCIL0_PMM0MA, 0xE0000001); /* 512M + No prefetching, */ /* and enable region */ - out32r(PCIX0_PMM1MA, 0x00000000); /* PMM0 Mask/Attribute */ + out32r(PCIL0_PMM1MA, 0x00000000); /* PMM0 Mask/Attribute */ /* - disabled b4 setting */ - out32r(PCIX0_PMM1LA, CONFIG_SYS_PCI_MEMBASE2); /* PMM0 Local Address */ - out32r(PCIX0_PMM1PCILA, CONFIG_SYS_PCI_MEMBASE2); /* PMM0 PCI Low Address */ - out32r(PCIX0_PMM1PCIHA, 0x00000000); /* PMM0 PCI High Address */ - out32r(PCIX0_PMM1MA, 0xE0000001); /* 512M + No prefetching, */ + out32r(PCIL0_PMM1LA, CONFIG_SYS_PCI_MEMBASE2); /* PMM0 Local Address */ + out32r(PCIL0_PMM1PCILA, CONFIG_SYS_PCI_MEMBASE2); /* PMM0 PCI Low Address */ + out32r(PCIL0_PMM1PCIHA, 0x00000000); /* PMM0 PCI High Address */ + out32r(PCIL0_PMM1MA, 0xE0000001); /* 512M + No prefetching, */ /* and enable region */ - out32r(PCIX0_PTM1MS, 0x00000001); /* Memory Size/Attribute */ - out32r(PCIX0_PTM1LA, 0); /* Local Addr. Reg */ - out32r(PCIX0_PTM2MS, 0); /* Memory Size/Attribute */ - out32r(PCIX0_PTM2LA, 0); /* Local Addr. Reg */ + out32r(PCIL0_PTM1MS, 0x00000001); /* Memory Size/Attribute */ + out32r(PCIL0_PTM1LA, 0); /* Local Addr. Reg */ + out32r(PCIL0_PTM2MS, 0); /* Memory Size/Attribute */ + out32r(PCIL0_PTM2LA, 0); /* Local Addr. Reg */ /* * Set up Configuration registers -- cgit v1.2.3