From d64ee908a1b525e5bb2b4cbeb5c449ad6a469666 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Thu, 16 Aug 2007 15:05:04 -0500 Subject: Update MPC8544 DS PCI memory map The PCIe bus that the ULI M1575 is connected to has no possible way of needing more than the fixed amount of IO & Memory space needed by the ULI. So make it use far less IO & memory space and have it use the shared LAW. This free's up a LAW for PCIe1 IO space. Also reduce the amount of IO space needed by each bus. Signed-off-by: Kumar Gala --- board/freescale/mpc8544ds/init.S | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) (limited to 'board/freescale') diff --git a/board/freescale/mpc8544ds/init.S b/board/freescale/mpc8544ds/init.S index ea7d54dc3..900c3680c 100644 --- a/board/freescale/mpc8544ds/init.S +++ b/board/freescale/mpc8544ds/init.S @@ -218,7 +218,7 @@ law_entry: .long LAWAR_EN | LAWAR_TRGT_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_512M) .long (CFG_PCI1_IO_PHYS>>12) & 0xfffff - .long LAWAR_EN | LAWAR_TRGT_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_16M) + .long LAWAR_EN | LAWAR_TRGT_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_64K) .long (CFG_LBC_CACHE_BASE>>12) & 0xfffff .long LAWAR_EN | LAWAR_TRGT_LBC | (LAWAR_SIZE & LAWAR_SIZE_256M) @@ -226,18 +226,17 @@ law_entry: .long (CFG_PCIE1_MEM_PHYS>>12) & 0xfffff .long LAWAR_EN | LAWAR_TRGT_PCIE1 | (LAWAR_SIZE & LAWAR_SIZE_256M) - /* To keep to 10 LAWs, PCIE1_IO_PHYS must use top of mem region */ + .long (CFG_PCIE1_IO_PHYS>>12) & 0xfffff + .long LAWAR_EN | LAWAR_TRGT_PCIE1 | (LAWAR_SIZE & LAWAR_SIZE_64K) .long (CFG_PCIE2_MEM_PHYS>>12) & 0xfffff .long LAWAR_EN | LAWAR_TRGT_PCIE2 | (LAWAR_SIZE & LAWAR_SIZE_512M) .long (CFG_PCIE2_IO_PHYS>>12) & 0xfffff - .long LAWAR_EN | LAWAR_TRGT_PCIE2 | (LAWAR_SIZE & LAWAR_SIZE_16M) + .long LAWAR_EN | LAWAR_TRGT_PCIE2 | (LAWAR_SIZE & LAWAR_SIZE_64K) + /* contains both PCIE3 MEM & IO space */ .long (CFG_PCIE3_MEM_PHYS>>12) & 0xfffff - .long LAWAR_EN | LAWAR_TRGT_PCIE3 | (LAWAR_SIZE & LAWAR_SIZE_256M) - - .long (CFG_PCIE3_IO_PHYS>>12) & 0xfffff - .long LAWAR_EN | LAWAR_TRGT_PCIE3 | (LAWAR_SIZE & LAWAR_SIZE_16M) + .long LAWAR_EN | LAWAR_TRGT_PCIE3 | (LAWAR_SIZE & LAWAR_SIZE_2M) 4: entry_end -- cgit v1.2.3