From 48b42616e928ce6eacfe20276a1614e2b27ac4b5 Mon Sep 17 00:00:00 2001
From: wdenk <wdenk>
Date: Thu, 19 Jun 2003 23:01:32 +0000
Subject: * Patches by David Müller, 12 Jun 2003:   - rewrite of the S3C24X0
 register definitions stuff   - "driver" for the built-in S3C24X0 RTC
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* Patches by Yuli Barcohen, 12 Jun 2003:
  - Add MII support and Ethernet PHY initialization for MPC8260ADS board
  - Fix incorrect SIUMCR initialisation caused by wrong Hard Reset
    configuration word supplied by FPGA on some MPC8260ADS boards

* Patch by Pantelis Antoniou, 10 Jun 2003:
  Unify status LED interface
---
 board/mpl/vcma9/vcma9.h | 88 +++++++++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 86 insertions(+), 2 deletions(-)

(limited to 'board/mpl/vcma9/vcma9.h')

diff --git a/board/mpl/vcma9/vcma9.h b/board/mpl/vcma9/vcma9.h
index bc0e3a460..4299d4e81 100644
--- a/board/mpl/vcma9/vcma9.h
+++ b/board/mpl/vcma9/vcma9.h
@@ -25,11 +25,97 @@
  * Global routines used for VCMA9
  *****************************************************************************/
 
+#include <s3c2410.h>
 
 extern int  mem_test(unsigned long start, unsigned long ramsize,int mode);
 
 void print_vcma9_info(void);
 
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+typedef enum {
+	NFCE_LOW,
+	NFCE_HIGH
+} NFCE_STATE;
+
+static inline void NF_Conf(u16 conf)
+{
+	S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+	nand->NFCONF = conf;
+}
+
+static inline void NF_Cmd(u8 cmd)
+{
+	S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+	nand->NFCMD = cmd;
+}
+
+static inline void NF_CmdW(u8 cmd)
+{
+	NF_Cmd(cmd);
+	udelay(1);
+}
+
+static inline void NF_Addr(u8 addr)
+{
+	S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+	nand->NFADDR = addr;
+}
+
+static inline void NF_SetCE(NFCE_STATE s)
+{
+	S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+	switch (s) {
+		case NFCE_LOW:
+			nand->NFCONF &= ~(1<<11);
+			break;
+
+		case NFCE_HIGH:
+			nand->NFCONF |= (1<<11);
+			break;
+	}
+}
+
+static inline void NF_WaitRB(void)
+{
+	S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+	while (!(nand->NFSTAT & (1<<0)));
+}
+
+static inline void NF_Write(u8 data)
+{
+	S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+	nand->NFDATA = data;
+}
+
+static inline u8 NF_Read(void)
+{
+	S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+	return(nand->NFDATA);
+}
+
+static inline void NF_Init_ECC(void)
+{
+	S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+	nand->NFCONF |= (1<<12);
+}
+
+static inline u32 NF_Read_ECC(void)
+{
+	S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
+
+	return(nand->NFECC);
+}
+
+#endif
+
 
 #define PLD_BASE_ADDRESS		0x2C000100
 #define PLD_ID_REG			(PLD_BASE_ADDRESS + 0)
@@ -39,5 +125,3 @@ void print_vcma9_info(void);
 #define PLD_GPCD_REG			(PLD_BASE_ADDRESS + 4)
 #define PLD_BOARD_REG			(PLD_BASE_ADDRESS + 5)
 
-
-
-- 
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