From 3d078ce6d786df932a0c00b8a95c0179c616ebc1 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Mon, 15 Aug 2005 16:03:56 +0200 Subject: Coding style cleanup --- board/sandburst/common/ppc440gx_i2c.c | 5 +--- board/sandburst/common/ppc440gx_i2c.h | 5 +--- board/sandburst/common/sb_common.c | 36 ++++++++++++++-------------- board/sandburst/common/sb_common.h | 45 +++++++++++++++-------------------- 4 files changed, 39 insertions(+), 52 deletions(-) (limited to 'board/sandburst/common') diff --git a/board/sandburst/common/ppc440gx_i2c.c b/board/sandburst/common/ppc440gx_i2c.c index c3b267c49..858b38cec 100644 --- a/board/sandburst/common/ppc440gx_i2c.c +++ b/board/sandburst/common/ppc440gx_i2c.c @@ -39,8 +39,6 @@ #ifdef CONFIG_I2C_BUS1 - - #define IIC_OK 0 #define IIC_NOK 1 #define IIC_NOK_LA 2 /* Lost arbitration */ @@ -511,5 +509,4 @@ U_BOOT_CMD( "\n -discover valid I2C chip addresses\n" ); -#endif - +#endif /* CONFIG_I2C_BUS1 */ diff --git a/board/sandburst/common/ppc440gx_i2c.h b/board/sandburst/common/ppc440gx_i2c.h index e25a3171a..cd4fc8666 100644 --- a/board/sandburst/common/ppc440gx_i2c.h +++ b/board/sandburst/common/ppc440gx_i2c.h @@ -34,11 +34,8 @@ #endif #include - #ifdef CONFIG_HARD_I2C - - #define I2C_BUS1_BASE_ADDR (CFG_PERIPHERAL_BASE + 0x00000500) #define I2C_REGISTERS_BUS1_BASE_ADDRESS I2C_BUS1_BASE_ADDR #define IIC_MDBUF1 (I2C_REGISTERS_BUS1_BASE_ADDRESS+IICMDBUF) @@ -64,4 +61,4 @@ int i2c_write1 (uchar chip, uint addr, int alen, uchar * buffer, int len); uchar i2c_reg_read1(uchar i2c_addr, uchar reg); void i2c_reg_write1(uchar i2c_addr, uchar reg, uchar val); -#endif +#endif /* CONFIG_HARD_I2C */ diff --git a/board/sandburst/common/sb_common.c b/board/sandburst/common/sb_common.c index 1251bc938..353041667 100644 --- a/board/sandburst/common/sb_common.c +++ b/board/sandburst/common/sb_common.c @@ -34,7 +34,7 @@ long int fixed_sdram (void); /************************************************************************* * metrobox_get_master * - * PRI_N - active low signal. If the GPIO pin is low we are the master + * PRI_N - active low signal. If the GPIO pin is low we are the master * ************************************************************************/ int sbcommon_get_master(void) @@ -81,7 +81,7 @@ unsigned short sbcommon_get_serial_number(void) unsigned short sernum; /* Get the board serial number from eeprom */ - /* Initialize I2C */ + /* Initialize I2C */ i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE); /* Read 256 bytes in EEPROM */ @@ -96,7 +96,7 @@ unsigned short sbcommon_get_serial_number(void) /************************************************************************* * sbcommon_fans * - * Spin up fans 2 & 3 to get some air moving. OS will take care + * Spin up fans 2 & 3 to get some air moving. OS will take care * of the rest. This is mostly a precaution... * * Assumes i2c bus 1 is ready. @@ -253,8 +253,8 @@ int testdram (void) /************************************************************************* * fixed sdram init -- doesn't use serial presence detect. * - * Assumes: 128 MB, non-ECC, non-registered - * PLB @ 133 MHz + * Assumes: 128 MB, non-ECC, non-registered + * PLB @ 133 MHz * ************************************************************************/ long int fixed_sdram (void) @@ -264,11 +264,11 @@ long int fixed_sdram (void) /*-------------------------------------------------------------------- * Setup some default *------------------------------------------------------------------*/ - mtsdram (mem_uabba, 0x00000000); /* ubba=0 (default) */ - mtsdram (mem_slio, 0x00000000); /* rdre=0 wrre=0 rarw=0 */ - mtsdram (mem_devopt, 0x00000000); /* dll=0 ds=0 (normal) */ - mtsdram (mem_wddctr, 0x00000000); /* wrcp=0 dcd=0 */ - mtsdram (mem_clktr, 0x40000000); /* clkp=1 (90 deg wr) dcdt=0 */ + mtsdram (mem_uabba, 0x00000000); /* ubba=0 (default) */ + mtsdram (mem_slio, 0x00000000); /* rdre=0 wrre=0 rarw=0 */ + mtsdram (mem_devopt, 0x00000000); /* dll=0 ds=0 (normal) */ + mtsdram (mem_wddctr, 0x00000000); /* wrcp=0 dcd=0 */ + mtsdram (mem_clktr, 0x40000000); /* clkp=1 (90 deg wr) dcdt=0 */ /*-------------------------------------------------------------------- * Setup for board-specific specific mem @@ -276,25 +276,25 @@ long int fixed_sdram (void) /* * Following for CAS Latency = 2.5 @ 133 MHz PLB */ - mtsdram (mem_b0cr, 0x000a4001); /* SDBA=0x000 128MB, Mode 3, enabled */ - mtsdram (mem_tr0, 0x410a4012); /* WR=2 WD=1 CL=2.5 PA=3 CP=4 LD=2 */ - /* RA=10 RD=3 */ + mtsdram (mem_b0cr, 0x000a4001); /* SDBA=0x000 128MB, Mode 3, enabled */ + mtsdram (mem_tr0, 0x410a4012); /* WR=2 WD=1 CL=2.5 PA=3 CP=4 LD=2 */ + /* RA=10 RD=3 */ mtsdram (mem_tr1, 0x8080082f); /* SS=T2 SL=STAGE 3 CD=1 CT=0x02f */ - mtsdram (mem_rtr, 0x08200000); /* Rate 15.625 ns @ 133 MHz PLB */ - mtsdram (mem_cfg1, 0x00000000); /* Self-refresh exit, disable PM */ - udelay (400); /* Delay 200 usecs (min) */ + mtsdram (mem_rtr, 0x08200000); /* Rate 15.625 ns @ 133 MHz PLB */ + mtsdram (mem_cfg1, 0x00000000); /* Self-refresh exit, disable PM */ + udelay (400); /* Delay 200 usecs (min) */ /*-------------------------------------------------------------------- * Enable the controller, then wait for DCEN to complete *------------------------------------------------------------------*/ - mtsdram (mem_cfg0, 0x86000000); /* DCEN=1, PMUD=1, 64-bit */ + mtsdram (mem_cfg0, 0x86000000); /* DCEN=1, PMUD=1, 64-bit */ for (;;) { mfsdram (mem_mcsts, reg); if (reg & 0x80000000) break; } - return (128 * 1024 * 1024); /* 128 MB */ + return (128 * 1024 * 1024); /* 128 MB */ } #endif /* !defined(CONFIG_SPD_EEPROM) */ diff --git a/board/sandburst/common/sb_common.h b/board/sandburst/common/sb_common.h index 8994e42da..888e4f01e 100644 --- a/board/sandburst/common/sb_common.h +++ b/board/sandburst/common/sb_common.h @@ -30,38 +30,35 @@ #include #include "ppc440gx_i2c.h" - - - /* * GPIO Settings */ /* Chassis settings */ -#define SBCOMMON_GPIO_PRI_N 0x00001000 /* 0 = Chassis Master, 1 = Slave */ -#define SBCOMMON_GPIO_SEC_PRES 0x00000800 /* 1 = Other board present */ +#define SBCOMMON_GPIO_PRI_N 0x00001000 /* 0 = Chassis Master, 1 = Slave */ +#define SBCOMMON_GPIO_SEC_PRES 0x00000800 /* 1 = Other board present */ /* Debug LEDs */ -#define SBCOMMON_GPIO_DBGLED_0 0x00000400 -#define SBCOMMON_GPIO_DBGLED_1 0x00000200 -#define SBCOMMON_GPIO_DBGLED_2 0x00100000 -#define SBCOMMON_GPIO_DBGLED_3 0x00000100 +#define SBCOMMON_GPIO_DBGLED_0 0x00000400 +#define SBCOMMON_GPIO_DBGLED_1 0x00000200 +#define SBCOMMON_GPIO_DBGLED_2 0x00100000 +#define SBCOMMON_GPIO_DBGLED_3 0x00000100 -#define SBCOMMON_GPIO_DBGLEDS (SBCOMMON_GPIO_DBGLED_0 | \ - SBCOMMON_GPIO_DBGLED_1 | \ - SBCOMMON_GPIO_DBGLED_2 | \ - SBCOMMON_GPIO_DBGLED_3) +#define SBCOMMON_GPIO_DBGLEDS (SBCOMMON_GPIO_DBGLED_0 | \ + SBCOMMON_GPIO_DBGLED_1 | \ + SBCOMMON_GPIO_DBGLED_2 | \ + SBCOMMON_GPIO_DBGLED_3) -#define SBCOMMON_GPIO_SYS_FAULT 0x00000080 -#define SBCOMMON_GPIO_SYS_OTEMP 0x00000040 -#define SBCOMMON_GPIO_SYS_STATUS 0x00000020 +#define SBCOMMON_GPIO_SYS_FAULT 0x00000080 +#define SBCOMMON_GPIO_SYS_OTEMP 0x00000040 +#define SBCOMMON_GPIO_SYS_STATUS 0x00000020 -#define SBCOMMON_GPIO_SYS_LEDS (SBCOMMON_GPIO_SYS_STATUS) +#define SBCOMMON_GPIO_SYS_LEDS (SBCOMMON_GPIO_SYS_STATUS) -#define SBCOMMON_GPIO_LEDS (SBCOMMON_GPIO_DBGLED_0 | \ - SBCOMMON_GPIO_DBGLED_1 | \ - SBCOMMON_GPIO_DBGLED_2 | \ - SBCOMMON_GPIO_DBGLED_3 | \ - SBCOMMON_GPIO_SYS_STATUS) +#define SBCOMMON_GPIO_LEDS (SBCOMMON_GPIO_DBGLED_0 | \ + SBCOMMON_GPIO_DBGLED_1 | \ + SBCOMMON_GPIO_DBGLED_2 | \ + SBCOMMON_GPIO_DBGLED_3 | \ + SBCOMMON_GPIO_SYS_STATUS) typedef struct ppc440_gpio_regs { volatile unsigned long out; @@ -71,13 +68,9 @@ typedef struct ppc440_gpio_regs { volatile unsigned long in; } __attribute__((packed)) ppc440_gpio_regs_t; - - - int sbcommon_get_master(void); int sbcommon_secondary_present(void); unsigned short sbcommon_get_serial_number(void); void sbcommon_fans(void); - #endif /* __SBCOMMON_H__ */ -- cgit v1.2.3