From c15947d6ce0d59925c97fdfac692476af6e262d0 Mon Sep 17 00:00:00 2001 From: Hugo Villeneuve Date: Thu, 10 Jul 2008 10:46:33 -0400 Subject: ARM: Fix for broken compilation when defining CONFIG_CMD_ELF caused by missing dcache status/enable/disable functions. Signed-off-by: Hugo Villeneuve --- cpu/arm926ejs/cpu.c | 51 +++++++++++++++++++++++++++++++++++++++------------ 1 file changed, 39 insertions(+), 12 deletions(-) (limited to 'cpu/arm926ejs/cpu.c') diff --git a/cpu/arm926ejs/cpu.c b/cpu/arm926ejs/cpu.c index 722732e58..56c6289da 100644 --- a/cpu/arm926ejs/cpu.c +++ b/cpu/arm926ejs/cpu.c @@ -134,25 +134,52 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) return (0); } -void icache_enable (void) +/* cache_bit must be either C1_IC or C1_DC */ +static void cache_enable(uint32_t cache_bit) { - ulong reg; + uint32_t reg; - reg = read_p15_c1 (); /* get control reg. */ - cp_delay (); - write_p15_c1 (reg | C1_IC); + reg = read_p15_c1(); /* get control reg. */ + cp_delay(); + write_p15_c1(reg | cache_bit); } -void icache_disable (void) +/* cache_bit must be either C1_IC or C1_DC */ +static void cache_disable(uint32_t cache_bit) { - ulong reg; + uint32_t reg; - reg = read_p15_c1 (); - cp_delay (); - write_p15_c1 (reg & ~C1_IC); + reg = read_p15_c1(); + cp_delay(); + write_p15_c1(reg & ~cache_bit); } -int icache_status (void) +void icache_enable(void) { - return (read_p15_c1 () & C1_IC) != 0; + cache_enable(C1_IC); +} + +void icache_disable(void) +{ + cache_disable(C1_IC); +} + +int icache_status(void) +{ + return (read_p15_c1() & C1_IC) != 0; +} + +void dcache_enable(void) +{ + cache_enable(C1_DC); +} + +void dcache_disable(void) +{ + cache_disable(C1_DC); +} + +int dcache_status(void) +{ + return (read_p15_c1() & C1_DC) != 0; } -- cgit v1.2.3