From 356a0d9f3123b57392935febd300ce32e63f1278 Mon Sep 17 00:00:00 2001 From: wdenk Date: Wed, 9 Jun 2004 00:10:59 +0000 Subject: Patch by Markus Pietrek, 04 May 2004: Fix clear_bss code for ARM systems (all except s3c44b0 which doesn't clear BSS at all?) --- drivers/inca-ip_sw.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/inca-ip_sw.c b/drivers/inca-ip_sw.c index f8fe52ea2..ab22b4d53 100644 --- a/drivers/inca-ip_sw.c +++ b/drivers/inca-ip_sw.c @@ -41,13 +41,21 @@ #define DELAY udelay(10000) + /* Sometimes the store word instruction hangs while writing to one + * of the Switch registers. Moving the instruction into a separate + * function somehow makes the problem go away. + */ +static void SWORD(volatile u32 * reg, u32 value) +{ + *reg = value; +} #define DMA_WRITE_REG(reg, value) *((volatile u32 *)reg) = (u32)value; #define DMA_READ_REG(reg, value) value = (u32)*((volatile u32*)reg) #define SW_WRITE_REG(reg, value) \ - *((volatile u32*)reg) = (u32)value;\ + SWORD(reg, value);\ DELAY;\ - *((volatile u32*)reg) = (u32)value; + SWORD(reg, value); #define SW_READ_REG(reg, value) \ value = (u32)*((volatile u32*)reg);\ -- cgit v1.2.3