From 9c0f42ecfe25f7ffce8ec7a815f03864d723ffe3 Mon Sep 17 00:00:00 2001
From: Wolfgang Denk <wd@pollux.denx.de>
Date: Sun, 24 Dec 2006 01:42:57 +0100
Subject: Minor code cleanup.

---
 include/configs/TQM8272.h | 20 ++++++++------------
 1 file changed, 8 insertions(+), 12 deletions(-)

(limited to 'include')

diff --git a/include/configs/TQM8272.h b/include/configs/TQM8272.h
index 0f62755d7..925bf3431 100644
--- a/include/configs/TQM8272.h
+++ b/include/configs/TQM8272.h
@@ -38,8 +38,8 @@
 #define CONFIG_TQM8272		1
 
 #define	CONFIG_GET_CPU_STR_F	1	/* Get the CPU ID STR */
-#define CONFIG_BOARD_GET_CPU_CLK_F	1 /* Get the CLKIN from board fct */ 
- 
+#define CONFIG_BOARD_GET_CPU_CLK_F	1 /* Get the CLKIN from board fct */
+
 #define	STK82xx_150		1	/* on a STK82xx.150 */
 
 #define CONFIG_CPM2		1	/* Has a CPM2 */
@@ -71,13 +71,13 @@
 		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
 		":${hostname}:${netdev}:off panic=1\0"			\
 	"addcons=setenv bootargs ${bootargs} "				\
-		"console=$(consdev),$(baudrate)\0"				\
-	"flash_nfs=run nfsargs addip addcons;"					\
+		"console=$(consdev),$(baudrate)\0"			\
+	"flash_nfs=run nfsargs addip addcons;"				\
 		"bootm ${kernel_addr}\0"				\
-	"flash_self=run ramargs addip addcons;"					\
+	"flash_self=run ramargs addip addcons;"				\
 		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
 	"net_nfs=tftp 300000 ${bootfile};"				\
-		"run nfsargs addip addcons;bootm\0"	\
+		"run nfsargs addip addcons;bootm\0"			\
 	"rootpath=/opt/eldk/ppc_82xx\0"					\
 	"bootfile=/tftpboot/tqm8272/uImage\0"				\
 	"kernel_addr=40080000\0"					\
@@ -86,7 +86,7 @@
 	"update=protect off 40000000 4003ffff;era 40000000 4003ffff;"	\
 		"cp.b 300000 40000000 40000;"			        \
 		"setenv filesize;saveenv\0"				\
-	"cphwib=cp.b 4003fc00 33fc00 400\0"		\
+	"cphwib=cp.b 4003fc00 33fc00 400\0"				\
 	"upd=run load;run cphwib;run update\0"				\
 	""
 #define CONFIG_BOOTCOMMAND	"run flash_self"
@@ -262,7 +262,6 @@
 #define MIIDELAY	udelay(1)
 
 
-
 /* system clock rate (CLKIN) - equal to the 60x and local bus speed */
 #define CONFIG_8260_CLKIN	66666666	/* in Hz */
 
@@ -499,7 +498,6 @@
 #define BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from FLASH*/
 #define BOOTFLAG_WARM		0x02	/* Software reboot                 */
 
-
 /*-----------------------------------------------------------------------
  * Cache Configuration
  */
@@ -600,7 +598,7 @@
  *  0   60x     GPCM    32 bit  FLASH
  *  1   60x     SDRAM   64 bit  SDRAM
  *  2   60x	UPMB	 8 bit	NAND
- *  3   60x	UPMC	 8 bit	CAN	
+ *  3   60x	UPMC	 8 bit	CAN
  *
  */
 
@@ -634,7 +632,6 @@
  */
 #define CFG_MRS_OFFS	0x00000110
 
-
 /* Bank 0 - FLASH
  */
 #define CFG_BR0_PRELIM  ((CFG_FLASH_BASE & BRx_BA_MSK)  |\
@@ -724,7 +721,6 @@
 			 PSDMR_BUFCMD			|\
 			 PSDMR_CL_2)
 
-
 #define PSDMR_RFRC_66MHZ_SINGLE         0x00028000  /* PSDMR[RFRC] at 66 MHz single mode */
 #define PSDMR_RFRC_100MHZ_SINGLE        0x00030000  /* PSDMR[RFRC] at 100 MHz single mode */
 #define PSDMR_RFRC_133MHZ_SINGLE        0x00030000  /* PSDMR[RFRC] at 133 MHz single mode */
-- 
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