blob: 88a0cd4d619b9d15ddc9ebaf1615fd76199bc4da (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
|
/*
* U-boot - main board file
*
* Copyright (c) 2005-2008 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
#include <common.h>
#include <netdev.h>
#include <config.h>
#include <command.h>
#include <asm/blackfin.h>
DECLARE_GLOBAL_DATA_PTR;
int checkboard(void)
{
printf("Board: ADI BF548 EZ-Kit board\n");
printf(" Support: http://blackfin.uclinux.org/\n");
return 0;
}
phys_size_t initdram(int board_type)
{
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
return gd->bd->bi_memsize;
}
int board_early_init_f(void)
{
/* Port H: PH8 - PH13 == A4 - A9
* address lines of the parallel asynchronous memory interface
*/
/************************************************
* configure GPIO *
* set port H function enable register *
* configure PH8-PH13 as peripheral (not GPIO) *
*************************************************/
bfin_write_PORTH_FER(0x3F03);
/************************************************
* set port H MUX to configure PH8-PH13 *
* 1st Function (MUX = 00) (bits 16-27 == 0) *
* Set to address signals A4-A9 *
*************************************************/
bfin_write_PORTH_MUX(0);
/************************************************
* set port H direction register *
* enable PH8-PH13 as outputs *
*************************************************/
bfin_write_PORTH_DIR_SET(0x3F00);
/* Port I: PI0 - PH14 == A10 - A24
* address lines of the parallel asynchronous memory interface
*/
/************************************************
* set port I function enable register *
* configure PI0-PI14 as peripheral (not GPIO) *
*************************************************/
bfin_write_PORTI_FER(0x7fff);
/**************************************************
* set PORT I MUX to configure PI14-PI0 as *
* 1st Function (MUX=00) - address signals A10-A24 *
***************************************************/
bfin_write_PORTI_MUX(0);
/****************************************
* set PORT I direction register *
* enable PI0 - PI14 as outputs *
*****************************************/
bfin_write_PORTI_DIR_SET(0x7fff);
return 0;
}
#ifdef CONFIG_SMC911X
int board_eth_init(bd_t *bis)
{
return smc911x_initialize(0, CONFIG_SMC911X_BASE);
}
#endif
|