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authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>2013-07-16 10:03:22 +0200
committerPeter Korsgaard <jacmet@sunsite.dk>2013-07-16 15:28:03 +0200
commit85d0769ac5cb50527c5bbab4417262064971073f (patch)
tree06b04d5cd48397df61b840e78876b98263796a8b /arch/Config.in.arm
parentd2e3cc389d47f3f1f3aa5e92e2e00deb9f2f27ba (diff)
arch/arm: add support for Thumb2
Until now, we were using the default ARM instruction set, as used by the toolchain: the 32 bits ARM instruction set for the internal backend, and for external toolchain, whatever default was chosen when the toolchain was generated. This commit adds support for the Thumb2 instruction set. To do so, it: * provides a menuconfig choice between ARM and Thumb2. The choice is only shown when Thumb2 is supported, i.e on ARMv7-A CPUs. * passes the --with-mode={arm,thumb} option when building gcc in the internal backend. This tells the compiler which type of instructions it should generate. * passes the m{arm,thumb} option in the external toolchain wrapper. ARM and Thumb2 code can freely be mixed together, so the fact that the C library has been built either ARM or Thumb2 and that the rest of the code is built Thumb2 or ARM is not a problem. [Peter: fix empty BR2_GCC_TARGET_MODE check] Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Diffstat (limited to 'arch/Config.in.arm')
-rw-r--r--arch/Config.in.arm36
1 files changed, 36 insertions, 0 deletions
diff --git a/arch/Config.in.arm b/arch/Config.in.arm
index 2b493c093..94c32c967 100644
--- a/arch/Config.in.arm
+++ b/arch/Config.in.arm
@@ -31,6 +31,9 @@ config BR2_ARM_CPU_HAS_VFPV4
bool
select BR2_ARM_CPU_HAS_VFPV3
+config BR2_ARM_CPU_HAS_THUMB2
+ bool
+
choice
prompt "Target Architecture Variant"
depends on BR2_arm || BR2_armeb
@@ -65,22 +68,27 @@ config BR2_cortex_a5
bool "cortex-A5"
select BR2_ARM_CPU_MAYBE_HAS_NEON
select BR2_ARM_CPU_MAYBE_HAS_VFPV4
+ select BR2_ARM_CPU_HAS_THUMB2
config BR2_cortex_a7
bool "cortex-A7"
select BR2_ARM_CPU_HAS_NEON
select BR2_ARM_CPU_HAS_VFPV4
+ select BR2_ARM_CPU_HAS_THUMB2
config BR2_cortex_a8
bool "cortex-A8"
select BR2_ARM_CPU_HAS_NEON
select BR2_ARM_CPU_HAS_VFPV3
+ select BR2_ARM_CPU_HAS_THUMB2
config BR2_cortex_a9
bool "cortex-A9"
select BR2_ARM_CPU_MAYBE_HAS_NEON
select BR2_ARM_CPU_MAYBE_HAS_VFPV3
+ select BR2_ARM_CPU_HAS_THUMB2
config BR2_cortex_a15
bool "cortex-A15"
select BR2_ARM_CPU_HAS_NEON
select BR2_ARM_CPU_HAS_VFPV4
+ select BR2_ARM_CPU_HAS_THUMB2
config BR2_fa526
bool "fa526/626"
config BR2_pj4
@@ -275,6 +283,30 @@ config BR2_ARM_FPU_NEON_VFPV4
endchoice
+choice
+ prompt "ARM instruction set"
+ depends on BR2_ARM_CPU_HAS_THUMB2
+
+config BR2_ARM_INSTRUCTIONS_ARM_CHOICE
+ bool "ARM"
+ help
+ This option instructs the compiler to generate regular ARM
+ instructions, that are all 32 bits wide.
+
+config BR2_ARM_INSTRUCTIONS_THUMB2
+ bool "Thumb2"
+ help
+ This option instructions the compiler to generate Thumb2
+ instructions, which allows to mix 16 bits instructions and
+ 32 bits instructions. This generally provides a much smaller
+ compiled binary size.
+
+endchoice
+
+config BR2_ARM_INSTRUCTIONS_ARM
+ def_bool y
+ depends on !BR2_ARM_INSTRUCTIONS_THUMB2
+
config BR2_ARCH
default "arm" if BR2_arm
default "armeb" if BR2_armeb
@@ -344,3 +376,7 @@ config BR2_GCC_TARGET_FLOAT_ABI
default "soft" if BR2_ARM_SOFT_FLOAT
default "softfp" if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABI
default "hard" if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABIHF
+
+config BR2_GCC_TARGET_MODE
+ default "arm" if BR2_ARM_INSTRUCTIONS_ARM
+ default "thumb" if BR2_ARM_INSTRUCTIONS_THUMB2