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authorVicente Olivert Riera <Vincent.Riera@imgtec.com>2016-11-08 10:32:57 +0000
committerThomas Petazzoni <thomas.petazzoni@free-electrons.com>2016-11-09 22:41:51 +0100
commitb2bae3b523aedd3ccf798c492f525660c4943770 (patch)
tree257c0b365582719a6e93b4e67c52b4c47f41aa0c /arch/Config.in.mips
parent84bd58d5bb06bfedb88e8abca53ec5b88ae9b29f (diff)
MIPS: rename M5101 core to M5150
m5101 is the -march option for GCC, but the real core name is M5150. Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com> Reviewed-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Diffstat (limited to 'arch/Config.in.mips')
-rw-r--r--arch/Config.in.mips6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/Config.in.mips b/arch/Config.in.mips
index 21f0a8d10..29a967df5 100644
--- a/arch/Config.in.mips
+++ b/arch/Config.in.mips
@@ -47,8 +47,8 @@ config BR2_mips_interaptiv
bool "interAptiv"
depends on !BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS32R2
-config BR2_mips_m5101
- bool "M5101"
+config BR2_mips_m5150
+ bool "M5150"
depends on !BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS32R5
config BR2_mips_m6201
@@ -142,7 +142,7 @@ config BR2_GCC_TARGET_ARCH
default "mips32r5" if BR2_mips_32r5
default "mips32r6" if BR2_mips_32r6
default "interaptiv" if BR2_mips_interaptiv
- default "m5101" if BR2_mips_m5101
+ default "m5101" if BR2_mips_m5150
default "m6201" if BR2_mips_m6201
default "p5600" if BR2_mips_p5600
default "mips32r2" if BR2_mips_xburst