diff options
| author | Vicente Olivert Riera <Vincent.Riera@imgtec.com> | 2016-10-15 12:26:12 +0100 |
|---|---|---|
| committer | Peter Korsgaard <peter@korsgaard.com> | 2016-10-15 14:30:45 +0200 |
| commit | 606cc1320dcaabbb1e2721f95c31f2073accbad1 (patch) | |
| tree | 1b021e617f9a0d4f8534cfeeb0441a6f47713a60 /package/openblas | |
| parent | dad86ab515e07196fd18a28557f895dd49f93d4d (diff) | |
openblas: use MIPS specific cores for P5600 and I6400
Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
Diffstat (limited to 'package/openblas')
| -rw-r--r-- | package/openblas/Config.in | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/package/openblas/Config.in b/package/openblas/Config.in index 1fbed1c27..de26ab3b7 100644 --- a/package/openblas/Config.in +++ b/package/openblas/Config.in @@ -27,10 +27,10 @@ config BR2_PACKAGE_OPENBLAS_DEFAULT_TARGET default "PPC440" if BR2_powerpc_440 default "PPC440FP2" if BR2_powerpc_440fp # P5600 is built with MSA support which is only available in Codescape toolchains - default "P5600" if BR2_MIPS_CPU_MIPS32R2 && BR2_TOOLCHAIN_EXTERNAL_CODESCAPE_MTI_MIPS + default "P5600" if BR2_mips_p5600 && BR2_TOOLCHAIN_EXTERNAL_CODESCAPE_MTI_MIPS default "SICORTEX" if BR2_MIPS_CPU_MIPS64 # I6400 is built with MSA support which is only available in Codescape toolchains - default "I6400" if BR2_MIPS_CPU_MIPS64R6 && BR2_TOOLCHAIN_EXTERNAL_CODESCAPE_IMG_MIPS + default "I6400" if BR2_mips_i6400 && BR2_TOOLCHAIN_EXTERNAL_CODESCAPE_IMG_MIPS default "SPARC" if BR2_sparc # Cortex-A15 always have a VFPv4 default "CORTEXA15" if (BR2_cortex_a15 && BR2_ARM_EABIHF) |