diff options
| author | Ben Widawsky <ben@bwidawsk.net> | 2011-07-17 12:43:12 -0700 |
|---|---|---|
| committer | Ben Widawsky <ben@bwidawsk.net> | 2011-07-28 13:52:28 -0700 |
| commit | e39b13d7e4174ec50fd41d74fe8d3375c8ef2850 (patch) | |
| tree | 8db26cf21ccfdaf91eac299983c3f6301992e4c4 | |
| parent | c82c1d68469ae99b40fa260a1b4c4debb9130515 (diff) | |
intel-gpu-tools/debugging: add important debug regs
Cc: Chris Wilson <chris@chris-wilson.co.uk>
| -rw-r--r-- | lib/intel_reg.h | 4 | ||||
| -rw-r--r-- | tests/gen6_render.h | 8 |
2 files changed, 11 insertions, 1 deletions
diff --git a/lib/intel_reg.h b/lib/intel_reg.h index 48d8f66d..308f5976 100644 --- a/lib/intel_reg.h +++ b/lib/intel_reg.h @@ -359,6 +359,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define THREE_D_INST_DISABLE 0x04 #define STATE_VAR_UPDATE_DISABLE 0x02 #define PAL_STIP_DISABLE 0x01 +#define GEN6_GLOBAL_DEBUG_ENABLE 0x10 #define MEMMODE 0x20dc @@ -3488,5 +3489,8 @@ typedef enum { #define TRANS_DP_HSYNC_ACTIVE_HIGH (1<<3) #define TRANS_DP_HSYNC_ACTIVE_LOW 0 +/* Debug regs */ +#define GEN6_TD_CTL 0x7000 /* <= GEN5 was at 0x8000 */ +#define GEN6_TD_CTL_FORCE_TD_BKPT (1<<4) #endif /* _I810_REG_H */ diff --git a/tests/gen6_render.h b/tests/gen6_render.h index fa940d9d..2c63c9e7 100644 --- a/tests/gen6_render.h +++ b/tests/gen6_render.h @@ -259,7 +259,10 @@ #define GEN6_TS_STRG_VAL 0x7e04 #define GEN6_TS_RDATA 0x7e08 +/* TD_CTL on gen6 is 0x7000, to not break stuff which depends on this... */ +#ifndef GEN6_TD_CTL #define GEN6_TD_CTL 0x8000 +#endif #define GEN6_TD_CTL_MUX_SHIFT 8 #define GEN6_TD_CTL_EXTERNAL_HALT_R0_DEBUG_MATCH (1 << 7) #define GEN6_TD_CTL_FORCE_EXTERNAL_HALT (1 << 6) @@ -565,7 +568,10 @@ #define GEN6_TS_STRG_VAL 0x7e04 #define GEN6_TS_RDATA 0x7e08 -#define GEN6_TD_CTL 0x8000 +/* TD_CTL on gen6 is 0x7000, to not break stuff which depends on this... */ +#ifndef GEN6_TD_CTL +#define GEN6_TD_CTL 0x8000 +#endif #define GEN6_TD_CTL_MUX_SHIFT 8 #define GEN6_TD_CTL_EXTERNAL_HALT_R0_DEBUG_MATCH (1 << 7) #define GEN6_TD_CTL_FORCE_EXTERNAL_HALT (1 << 6) |