diff options
author | Damien Lespiau <damien.lespiau@intel.com> | 2013-01-15 16:40:06 +0000 |
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committer | Damien Lespiau <damien.lespiau@intel.com> | 2013-03-04 15:54:36 +0000 |
commit | 668e0dff7da8a604e626c1c5fefe65a3a8f2be19 (patch) | |
tree | e67cf43435394ba70ae1f35198bc85726b316ac5 /assembler/brw_structs.h | |
parent | 31259c5edc51d16afcfd453f7abaf81601a62a15 (diff) |
assembler: Rename dp_read_gen6 to gen6_dp_sampler_const_cache
The purpose of this commit is to synchronize opcode definitions across
the gen4asm assembler and mesa.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Diffstat (limited to 'assembler/brw_structs.h')
-rw-r--r-- | assembler/brw_structs.h | 27 |
1 files changed, 16 insertions, 11 deletions
diff --git a/assembler/brw_structs.h b/assembler/brw_structs.h index e4fdb515..e2be147c 100644 --- a/assembler/brw_structs.h +++ b/assembler/brw_structs.h @@ -1469,17 +1469,22 @@ struct brw_instruction GLuint end_of_thread:1; } dp_read_gen5; - struct { - GLuint binding_table_index:8; - GLuint msg_control:5; - GLuint msg_type:3; - GLuint pad0:3; - GLuint header_present:1; - GLuint response_length:5; - GLuint msg_length:4; - GLuint pad1:2; - GLuint end_of_thread:1; - } dp_read_gen6; + /** + * Message for the Sandybridge Sampler Cache or Constant Cache Data Port. + * + * See the Sandybridge PRM, Volume 4 Part 1, Section 3.9.2.1.1. + **/ + struct { + GLuint binding_table_index:8; + GLuint msg_control:5; + GLuint msg_type:3; + GLuint pad0:3; + GLuint header_present:1; + GLuint response_length:5; + GLuint msg_length:4; + GLuint pad1:2; + GLuint end_of_thread:1; + } gen6_dp_sampler_const_cache; struct { GLuint binding_table_index:8; |