diff options
| author | Xiang, Haihao <haihao.xiang@intel.com> | 2013-08-14 14:21:16 -0700 |
|---|---|---|
| committer | Ben Widawsky <benjamin.widawsky@intel.com> | 2013-08-15 14:46:57 -0700 |
| commit | 62298329350b965e4bbfc558e5a4b1b3646742ea (patch) | |
| tree | 7412661ca7bf71af6a6a3c777004c67c72536f46 /assembler | |
| parent | 9d5e4fac207a9278ec26717576dff0e5d3766c57 (diff) | |
assembler: error for the wrong syntax of SEND instruction on GEN6+
predicate SEND execsize dst sendleadreg payload directsrcoperand instoptions
predicate SEND execsize dst sendleadreg payload imm32reg instoptions
predicate SEND execsize dst sendleadreg payload sndopr imm32reg instoptions
predicate SEND execsize dst sendleadreg payload exp directsrcoperand instoptions
The above four syntaxes are only used on legacy platforms which support implied move
from payload to dst.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Diffstat (limited to 'assembler')
| -rw-r--r-- | assembler/gram.y | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/assembler/gram.y b/assembler/gram.y index 09f21f1b..9673eeb3 100644 --- a/assembler/gram.y +++ b/assembler/gram.y @@ -1169,6 +1169,9 @@ sendinstruction: predicate sendop execsize exp post_dst payload msgtarget } | predicate sendop execsize dst sendleadreg payload directsrcoperand instoptions { + if (IS_GENp(6)) + error(&@2, "the syntax of send instruction\n"); + memset(&$$, 0, sizeof($$)); set_instruction_opcode(&$$, $2); GEN(&$$)->header.destreg__conditionalmod = $5.nr; /* msg reg index */ @@ -1187,6 +1190,9 @@ sendinstruction: predicate sendop execsize exp post_dst payload msgtarget } | predicate sendop execsize dst sendleadreg payload imm32reg instoptions { + if (IS_GENp(6)) + error(&@2, "the syntax of send instruction\n"); + if ($7.reg.type != BRW_REGISTER_TYPE_UD && $7.reg.type != BRW_REGISTER_TYPE_D && $7.reg.type != BRW_REGISTER_TYPE_V) { @@ -1290,6 +1296,9 @@ sendinstruction: predicate sendop execsize exp post_dst payload msgtarget } | predicate sendop execsize dst sendleadreg payload sndopr imm32reg instoptions { + if (IS_GENp(6)) + error(&@2, "the syntax of send instruction\n"); + if ($8.reg.type != BRW_REGISTER_TYPE_UD && $8.reg.type != BRW_REGISTER_TYPE_D && $8.reg.type != BRW_REGISTER_TYPE_V) { @@ -1316,6 +1325,9 @@ sendinstruction: predicate sendop execsize exp post_dst payload msgtarget } | predicate sendop execsize dst sendleadreg payload exp directsrcoperand instoptions { + if (IS_GENp(6)) + error(&@2, "the syntax of send instruction\n"); + memset(&$$, 0, sizeof($$)); set_instruction_opcode(&$$, $2); GEN(&$$)->header.destreg__conditionalmod = $5.nr; /* msg reg index */ |