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| author | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2017-06-05 12:36:54 +0100 |
|---|---|---|
| committer | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2017-06-08 09:03:06 +0100 |
| commit | 65173e1aaa909ddef37321170dfb33a2992ba6f4 (patch) | |
| tree | 2a73e99b82f79f919552f11f16d8329c5075d048 /assembler | |
| parent | c14a2602a973da42d4cfcaed68dbf1c80d47945d (diff) | |
gem_wsim: Asymmetrical 1-to-n workloads
Simulates a single decoder feeding multiple processing and
encoding pipelines.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Diffstat (limited to 'assembler')
0 files changed, 0 insertions, 0 deletions