diff options
| author | Eric Anholt <eric@anholt.net> | 2006-08-24 16:37:04 -0700 |
|---|---|---|
| committer | Damien Lespiau <damien.lespiau@intel.com> | 2013-03-04 15:54:21 +0000 |
| commit | e865196a9d28d0097e76d606f727939c11bf6147 (patch) | |
| tree | e529b94a499edee76f8a01493fb872fcd9d27fba /assembler | |
| parent | 5232981c8898489d5ce69be5a3fd6ffd32432ca8 (diff) | |
Add a syntax for urb write messages.
Diffstat (limited to 'assembler')
| -rw-r--r-- | assembler/gram.y | 24 | ||||
| -rw-r--r-- | assembler/lex.l | 6 | ||||
| -rw-r--r-- | assembler/packed_yuv_sf.g4a | 2 |
3 files changed, 30 insertions, 2 deletions
diff --git a/assembler/gram.y b/assembler/gram.y index bc0e1e6a..425d27be 100644 --- a/assembler/gram.y +++ b/assembler/gram.y @@ -72,6 +72,7 @@ %token NOP %token MSGLEN RETURNLEN +%token <integer> ALLOCATE USED COMPLETE TRANSPOSE INTERLEAVE %token SATURATE %token <integer> INTEGER @@ -90,6 +91,7 @@ %type <integer> conditionalmodifier saturate negate abs %type <integer> regtype srcimmtype execsize dstregion %type <integer> subregnum sampler_datatype +%type <integer> urb_swizzle urb_allocate urb_used urb_complete %type <region> region %type <direct_gen_reg> directgenreg directmsgreg addrreg accreg flagreg maskreg %type <direct_gen_reg> nullreg @@ -289,9 +291,16 @@ msgtarget: NULL_TOKEN $$.bits3.dp_write.msg_type = $7; $$.bits3.dp_write.send_commit_msg = $9; } - | URB + | URB INTEGER urb_swizzle urb_allocate urb_used urb_complete { $$.bits3.generic.msg_target = BRW_MESSAGE_TARGET_URB; + $$.bits3.urb.opcode = BRW_URB_OPCODE_WRITE; + $$.bits3.urb.offset = $2; + $$.bits3.urb.swizzle_control = $3; + $$.bits3.urb.pad = 0; + $$.bits3.urb.allocate = $4; + $$.bits3.urb.used = $5; + $$.bits3.urb.complete = $6; } | THREAD_SPAWNER { @@ -300,6 +309,19 @@ msgtarget: NULL_TOKEN } ; +urb_allocate: ALLOCATE { $$ = 1; } + | /* empty */ { $$ = 0; } + +urb_used: USED { $$ = 1; } + | /* empty */ { $$ = 0; } + +urb_complete: COMPLETE { $$ = 1; } + | /* empty */ { $$ = 0; } + +urb_swizzle: TRANSPOSE { $$ = BRW_URB_SWIZZLE_TRANSPOSE; } + | INTERLEAVE { $$ = BRW_URB_SWIZZLE_INTERLEAVE; } + | /* empty */ { $$ = BRW_URB_SWIZZLE_NONE; } + sampler_datatype: TYPE_F | TYPE_UD diff --git a/assembler/lex.l b/assembler/lex.l index 1e58b6ac..6bca52dd 100644 --- a/assembler/lex.l +++ b/assembler/lex.l @@ -55,6 +55,12 @@ int saved_state = INITIAL; "urb" { return URB; } "thread_spawner" { return THREAD_SPAWNER; } +"allocate" { return ALLOCATE; } +"used" { return USED; } +"complete" { return COMPLETE; } +"transpose" { return TRANSPOSE; } +"interleave" { return INTERLEAVE; } + ";" { return SEMICOLON; } "(" { return LPAREN; } ")" { return RPAREN; } diff --git a/assembler/packed_yuv_sf.g4a b/assembler/packed_yuv_sf.g4a index 436d9e8e..1b2d84fd 100644 --- a/assembler/packed_yuv_sf.g4a +++ b/assembler/packed_yuv_sf.g4a @@ -6,7 +6,7 @@ mul (1) g7.4<1>F g7.4<0,1,0>F g6.4<0,1,0>F { align1 }; mov (8) m1<1>F g7<0,1,0>F { align1 }; mov (8) m2<1>F g7.4<0,1,0>F { align1 }; mov (8) m3<1>F g3<8,8,1>F { align1 }; -send (8) 0 null g0<8,8,1>F urb mlen 4 rlen 0 write +0 transpose used complete EOT{ align1 }; +send (8) 0 null g0<8,8,1>F urb 0 transpose used complete mlen 4 rlen 0 { align1 EOT }; nop; nop; nop; |