diff options
| author | Damien Lespiau <damien.lespiau@intel.com> | 2013-01-16 01:50:47 +0000 |
|---|---|---|
| committer | Damien Lespiau <damien.lespiau@intel.com> | 2013-03-04 15:54:36 +0000 |
| commit | f2059b7cc75deaeabb8ef2104a1fe7a595a94de0 (patch) | |
| tree | a08219c5115de3eac9870bdd2cd8fbb8d1fb1180 /assembler | |
| parent | c7dac8495328f9b56895d3be410eea933079d8bd (diff) | |
assembler: Rename bits3.id and bits3.fd
As always, to sync with mesa.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Diffstat (limited to 'assembler')
| -rw-r--r-- | assembler/brw_structs.h | 4 | ||||
| -rw-r--r-- | assembler/disasm.c | 6 |
2 files changed, 5 insertions, 5 deletions
diff --git a/assembler/brw_structs.h b/assembler/brw_structs.h index 2815256e..c442f4a1 100644 --- a/assembler/brw_structs.h +++ b/assembler/brw_structs.h @@ -1599,8 +1599,8 @@ struct brw_instruction } generic_gen5; GLuint ud; - GLint id; - GLfloat fd; + GLint d; + GLfloat f; } bits3; char *first_reloc_target, *second_reloc_target; // first for JIP, second for UIP diff --git a/assembler/disasm.c b/assembler/disasm.c index 6260a4e5..b6fdc2e0 100644 --- a/assembler/disasm.c +++ b/assembler/disasm.c @@ -628,13 +628,13 @@ static int imm (FILE *file, GLuint type, struct brw_instruction *inst) { format (file, "0x%08xUD", inst->bits3.ud); break; case BRW_REGISTER_TYPE_D: - format (file, "%dD", inst->bits3.id); + format (file, "%dD", inst->bits3.d); break; case BRW_REGISTER_TYPE_UW: format (file, "0x%04xUW", (uint16_t) inst->bits3.ud); break; case BRW_REGISTER_TYPE_W: - format (file, "%dW", (int16_t) inst->bits3.id); + format (file, "%dW", (int16_t) inst->bits3.d); break; case BRW_REGISTER_TYPE_UB: format (file, "0x%02xUB", (int8_t) inst->bits3.ud); @@ -646,7 +646,7 @@ static int imm (FILE *file, GLuint type, struct brw_instruction *inst) { format (file, "0x%08xV", inst->bits3.ud); break; case BRW_REGISTER_TYPE_F: - format (file, "%-gF", inst->bits3.fd); + format (file, "%-gF", inst->bits3.f); } return 0; } |