diff options
| author | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2017-06-07 10:01:25 +0100 |
|---|---|---|
| committer | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2017-06-08 09:03:06 +0100 |
| commit | 5a5be91d76879ddfc84a1a18f85a7e0099ee84ba (patch) | |
| tree | 5502cad256ced0db9bcd8a792e6ae607425e62d9 /benchmarks | |
| parent | 65173e1aaa909ddef37321170dfb33a2992ba6f4 (diff) | |
gem_wsim: Add some randomness to the 17i7 workload
It was the only one with no randomness.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Diffstat (limited to 'benchmarks')
| -rw-r--r-- | benchmarks/wsim/media_load_balance_17i7.wsim | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/benchmarks/wsim/media_load_balance_17i7.wsim b/benchmarks/wsim/media_load_balance_17i7.wsim index 25a69203..0830a323 100644 --- a/benchmarks/wsim/media_load_balance_17i7.wsim +++ b/benchmarks/wsim/media_load_balance_17i7.wsim @@ -1,7 +1,7 @@ -1.VCS.3000.0.1 -1.RCS.1000.-1.0 -1.RCS.3700.0.0 -1.RCS.1000.-2.0 -1.VCS.2300.-2.0 -1.RCS.4700.-1.0 -1.VCS.600.-1.1 +1.VCS.2800-3200.0.1 +1.RCS.900-1100.-1.0 +1.RCS.3600-3800.0.0 +1.RCS.900-1100.-2.0 +1.VCS.2200-2400.-2.0 +1.RCS.4500-4900.-1.0 +1.VCS.500-700.-1.1 |