gem_wsim: Add RTR balancer

This one flips a coin when it fails to decide where to schedule.

It works well with the hd12 workload, either for one or multiple
clients, on which other balancers fail at the moment.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

1 files changed, 32 insertions, 3 deletions

diff --git a/benchmarks/gem_wsim.c b/benchmarks/gem_wsim.c
index 2da96040..26750a01 100644
--- a/benchmarks/gem_wsim.c
+++ b/benchmarks/gem_wsim.c
@@ -766,8 +766,8 @@ static const struct workload_balancer qd_balancer = {
 };
 
 static enum intel_engine_id
-rt_balance(const struct workload_balancer *balancer,
-	   struct workload *wrk, struct w_step *w)
+__rt_balance(const struct workload_balancer *balancer,
+	     struct workload *wrk, struct w_step *w, bool random)
 {
 	enum intel_engine_id engine;
 	long qd[NUM_ENGINES];
@@ -809,6 +809,8 @@ rt_balance(const struct workload_balancer *balancer,
 		n = 0;
 	else if (qd[VCS2] < qd[VCS1])
 		n = 1;
+	else if (random)
+		n = hars_petruska_f54_1_random_unsafe() & 1;
 	else
 		n = wrk->vcs_rr;
 
@@ -818,11 +820,32 @@ rt_balance(const struct workload_balancer *balancer,
 	return engine;
 }
 
+static enum intel_engine_id
+rt_balance(const struct workload_balancer *balancer,
+	   struct workload *wrk, struct w_step *w)
+{
+
+	return __rt_balance(balancer, wrk, w, false);
+}
+
 static const struct workload_balancer rt_balancer = {
 	.get_qd = get_qd_depth,
 	.balance = rt_balance,
 };
 
+static enum intel_engine_id
+rtr_balance(const struct workload_balancer *balancer,
+	   struct workload *wrk, struct w_step *w)
+{
+
+	return __rt_balance(balancer, wrk, w, true);
+}
+
+static const struct workload_balancer rtr_balancer = {
+	.get_qd = get_qd_depth,
+	.balance = rtr_balance,
+};
+
 static void
 update_bb_seqno(struct w_step *w, enum intel_engine_id engine, uint32_t seqno)
 {
@@ -1099,7 +1122,7 @@ static void print_help(void)
 "	-r <n>		How many times to emit the workload.\n"
 "	-c <n>		Fork N clients emitting the workload simultaneously.\n"
 "	-x		Swap VCS1 and VCS2 engines in every other client.\n"
-"	-b <n>		Load balancing to use. (0: rr, 1: qd, 2: rt)\n"
+"	-b <n>		Load balancing to use. (0: rr, 1: qd, 2: rt, 3: rtr)\n"
 "	-2		Remap VCS2 to BCS\n"
 	);
 }
@@ -1218,6 +1241,12 @@ int main(int argc, char **argv)
 				balancer = &rt_balancer;
 				flags |= SEQNO | BALANCE | RT;
 				break;
+			case 3:
+				igt_assert(intel_gen(intel_get_drm_devid(fd)) >=
+					   8);
+				balancer = &rtr_balancer;
+				flags |= SEQNO | BALANCE | RT;
+				break;
 			default:
 				if (!quiet)
 					fprintf(stderr,