diff options
| author | Chris Wilson <chris@chris-wilson.co.uk> | 2014-08-29 15:19:57 +0100 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2014-08-29 20:02:10 +0100 |
| commit | 982f7eb238a0898c456e0574dee7c4507738d75f (patch) | |
| tree | f824758529ba8f510a57e632c5e8e81af852446a /benchmarks | |
| parent | 86055df9682948ef26b06b94a3856676d638e2fb (diff) | |
Prepare for 64bit relocation addresses
This reveal that quite a few locations were writing relocation offsets
but only allowing for 32 bit addresses. To reveal such places in active
tests, we also now double check that we do not use more batch space than
declared.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'benchmarks')
| -rw-r--r-- | benchmarks/intel_upload_blit_large.c | 2 | ||||
| -rw-r--r-- | benchmarks/intel_upload_blit_large_gtt.c | 2 | ||||
| -rw-r--r-- | benchmarks/intel_upload_blit_large_map.c | 2 | ||||
| -rw-r--r-- | benchmarks/intel_upload_blit_small.c | 2 |
4 files changed, 0 insertions, 8 deletions
diff --git a/benchmarks/intel_upload_blit_large.c b/benchmarks/intel_upload_blit_large.c index e12a2b11..d9287abf 100644 --- a/benchmarks/intel_upload_blit_large.c +++ b/benchmarks/intel_upload_blit_large.c @@ -104,11 +104,9 @@ do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch, OUT_BATCH(0); /* dst x1,y1 */ OUT_BATCH((height << 16) | width); /* dst x2,y2 */ OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); - BLIT_RELOC_UDW(batch->devid); OUT_BATCH(0); /* src x1,y1 */ OUT_BATCH(width * 4); /* src pitch */ OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0); - BLIT_RELOC_UDW(batch->devid); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); diff --git a/benchmarks/intel_upload_blit_large_gtt.c b/benchmarks/intel_upload_blit_large_gtt.c index c06c56c6..9859a740 100644 --- a/benchmarks/intel_upload_blit_large_gtt.c +++ b/benchmarks/intel_upload_blit_large_gtt.c @@ -102,11 +102,9 @@ do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch, OUT_BATCH(0); /* dst x1,y1 */ OUT_BATCH((height << 16) | width); /* dst x2,y2 */ OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); - BLIT_RELOC_UDW(batch->devid); OUT_BATCH(0); /* src x1,y1 */ OUT_BATCH(width * 4); /* src pitch */ OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0); - BLIT_RELOC_UDW(batch->devid); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); diff --git a/benchmarks/intel_upload_blit_large_map.c b/benchmarks/intel_upload_blit_large_map.c index 18d2dfe4..771cb3cd 100644 --- a/benchmarks/intel_upload_blit_large_map.c +++ b/benchmarks/intel_upload_blit_large_map.c @@ -105,11 +105,9 @@ do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch, OUT_BATCH(0); /* dst x1,y1 */ OUT_BATCH((height << 16) | width); /* dst x2,y2 */ OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); - BLIT_RELOC_UDW(batch->devid); OUT_BATCH(0); /* src x1,y1 */ OUT_BATCH(width * 4); /* src pitch */ OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0); - BLIT_RELOC_UDW(batch->devid); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); diff --git a/benchmarks/intel_upload_blit_small.c b/benchmarks/intel_upload_blit_small.c index 05590b13..b7d80687 100644 --- a/benchmarks/intel_upload_blit_small.c +++ b/benchmarks/intel_upload_blit_small.c @@ -115,11 +115,9 @@ do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch, OUT_BATCH(0); /* dst x1,y1 */ OUT_BATCH((height << 16) | width); /* dst x2,y2 */ OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); - BLIT_RELOC_UDW(batch->devid); OUT_BATCH(0); /* src x1,y1 */ OUT_BATCH(width * 4); /* src pitch */ OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0); - BLIT_RELOC_UDW(batch->devid); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); |