diff options
| author | Lionel Landwerlin <lionel.g.landwerlin@intel.com> | 2017-12-05 16:43:01 +0000 |
|---|---|---|
| committer | Lionel Landwerlin <lionel.g.landwerlin@intel.com> | 2017-12-08 17:21:29 +0000 |
| commit | a9387971acf45d1215fdd8af00285b92468f249b (patch) | |
| tree | 5e5150a0e63e0822b7d3f3177f19ad0aedaa01bf /include/drm-uapi/amdgpu_drm.h | |
| parent | efef51dd75c8f41aa6ba08e806f8c81501eb7ee7 (diff) | |
include/drm-uapi: bump headers
Taken from drm-next :
commit 9c606cd4117a3c45e04a6616b1a0dbeb18eeee62
Merge: c5dd52f653fa 3997eea57caf
Author: Dave Airlie <airlied@redhat.com>
Date: Thu Dec 7 06:28:22 2017 +1000
Merge branch 'drm-next-4.16' of git://people.freedesktop.org/~agd5f/linux into drm-next
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'include/drm-uapi/amdgpu_drm.h')
| -rw-r--r-- | include/drm-uapi/amdgpu_drm.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/include/drm-uapi/amdgpu_drm.h b/include/drm-uapi/amdgpu_drm.h index 919248fb..4d21191a 100644 --- a/include/drm-uapi/amdgpu_drm.h +++ b/include/drm-uapi/amdgpu_drm.h @@ -160,6 +160,7 @@ union drm_amdgpu_bo_list { #define AMDGPU_CTX_OP_ALLOC_CTX 1 #define AMDGPU_CTX_OP_FREE_CTX 2 #define AMDGPU_CTX_OP_QUERY_STATE 3 +#define AMDGPU_CTX_OP_QUERY_STATE2 4 /* GPU reset status */ #define AMDGPU_CTX_NO_RESET 0 @@ -170,6 +171,13 @@ union drm_amdgpu_bo_list { /* unknown cause */ #define AMDGPU_CTX_UNKNOWN_RESET 3 +/* indicate gpu reset occured after ctx created */ +#define AMDGPU_CTX_QUERY2_FLAGS_RESET (1<<0) +/* indicate vram lost occured after ctx created */ +#define AMDGPU_CTX_QUERY2_FLAGS_VRAMLOST (1<<1) +/* indicate some job from this context once cause gpu hang */ +#define AMDGPU_CTX_QUERY2_FLAGS_GUILTY (1<<2) + /* Context priority level */ #define AMDGPU_CTX_PRIORITY_UNSET -2048 #define AMDGPU_CTX_PRIORITY_VERY_LOW -1023 @@ -869,6 +877,10 @@ struct drm_amdgpu_info_device { __u32 _pad1; /* always on cu bitmap */ __u32 cu_ao_bitmap[4][4]; + /** Starting high virtual address for UMDs. */ + __u64 high_va_offset; + /** The maximum high virtual address */ + __u64 high_va_max; }; struct drm_amdgpu_info_hw_ip { |