diff options
| author | Mika Kuoppala <mika.kuoppala@intel.com> | 2014-09-08 10:49:59 +0300 |
|---|---|---|
| committer | Mika Kuoppala <mika.kuoppala@intel.com> | 2014-10-09 19:47:51 +0300 |
| commit | 0e8ac72d5d608d82a91bb5232badfb872589ac14 (patch) | |
| tree | d4a515e7787b51fb5e691508bbda2a9cba00f273 /lib/gen6_render.h | |
| parent | b69659c3f5ed285bd218350deeff52761aec3d10 (diff) | |
tools/null_state_gen: Add Gen8 golden state
Previously we didn't have a clear understanding what is necessary
for a pipeline state to be properly initialized. So we had to improvise
and use a stripped out render copy.
Now we have a more clear understanding so switch out render copy based
frankenstate to state we can call golden state.
v2: - export intel_batch_state_offset
- add 3DSTATE_RASTER (Bradley Volkin)
Cc: Volkin, Bradley D <bradley.d.volkin@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Diffstat (limited to 'lib/gen6_render.h')
| -rw-r--r-- | lib/gen6_render.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/lib/gen6_render.h b/lib/gen6_render.h index c3e85eb7..8a4ec537 100644 --- a/lib/gen6_render.h +++ b/lib/gen6_render.h @@ -41,7 +41,7 @@ /* These two are BLC and CTG only, not BW or CL */ #define GEN6_3DSTATE_AA_LINE_PARAMS GEN6_3D(3, 1, 0xa) #define GEN6_3DSTATE_GS_SVB_INDEX GEN6_3D(3, 1, 0xb) - +#define GEN6_3DSTATE_MONOFILTER_SIZE GEN6_3D(3, 1, 0x11) #define GEN6_3DPRIMITIVE GEN6_3D(3, 3, 0) #define GEN6_3DSTATE_CLEAR_PARAMS GEN6_3D(3, 1, 0x10) @@ -91,6 +91,7 @@ # define GEN6_3DSTATE_SF_TRI_PROVOKE_SHIFT 29 # define GEN6_3DSTATE_SF_LINE_PROVOKE_SHIFT 27 # define GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT 25 +# define GEN6_3DSTATE_SF_VERTEX_SUB_PIXEL_PRECISION_SHIFT 12 #define GEN6_3DSTATE_WM GEN6_3D(3, 0, 0x14) /* DW2 */ @@ -303,7 +304,6 @@ #define GEN6_EU_ATT_CLR_1 0x8834 #define GEN6_EU_RDATA 0x8840 - #define GEN6_PIPE_CONTROL GEN6_3D(3, 2, 0) #define GEN6_3DPRIMITIVE GEN6_3D(3, 3, 0) @@ -411,6 +411,7 @@ /* for GEN6_STATE_BASE_ADDRESS */ #define BASE_ADDRESS_MODIFY (1 << 0) +#define BUFFER_SIZE_MODIFY (1 << 0) /* for GEN6_3DSTATE_PIPELINED_POINTERS */ #define GEN6_GS_DISABLE 0 |