diff options
| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2019-02-19 10:11:06 +0100 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2019-02-20 13:58:04 +0100 |
| commit | 4d0d81a2176227a7432762ae095ba386f3c8aba0 (patch) | |
| tree | d5cb63c1354b3e00fb008b42b55854177bf1fe0e /lib/igt_debugfs.c | |
| parent | 54e0e8b14f128919a0dbeb4d4f7b4fbbe30b5f60 (diff) | |
lib/crc: Reset fifo underrun reporting for every crc capture
We have tons of issues with crc mismatches, but often by that time
there was already a fifo underrun, which disables further fifo
underrun reporting. Reset fifo underrun reporting before we capture a
crc so that it's easier to figure out why the crc mismatch happened.
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Diffstat (limited to 'lib/igt_debugfs.c')
| -rw-r--r-- | lib/igt_debugfs.c | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/lib/igt_debugfs.c b/lib/igt_debugfs.c index 6cfaa975..640c78e9 100644 --- a/lib/igt_debugfs.c +++ b/lib/igt_debugfs.c @@ -808,6 +808,8 @@ void igt_pipe_crc_start(igt_pipe_crc_t *pipe_crc) /* Stop first just to make sure we don't have lingering state left. */ igt_pipe_crc_stop(pipe_crc); + igt_reset_fifo_underrun_reporting(pipe_crc->fd); + igt_assert_eq(write(pipe_crc->ctl_fd, src, strlen(src)), strlen(src)); sprintf(buf, "crtc-%d/crc/data", pipe_crc->pipe); @@ -1002,6 +1004,25 @@ void igt_pipe_crc_collect_crc(igt_pipe_crc_t *pipe_crc, igt_crc_t *out_crc) igt_pipe_crc_stop(pipe_crc); } +/** + * igt_reset_fifo_underrun_reporting: + * @drm_fd: drm device file descriptor + * + * Resets fifo underrun reporting, if supported by the device. Useful since fifo + * underrun reporting tends to be one-shot, so good to reset it before the + * actual functional test again in case there's been a separate issue happening + * while preparing the test setup. + */ +void igt_reset_fifo_underrun_reporting(int drm_fd) +{ + int fd = igt_debugfs_open(drm_fd, "i915_fifo_underrun_reset", O_WRONLY); + if (fd >= 0) { + igt_assert_eq(write(fd, "y", 1), 1); + + close(fd); + } +} + /* * Drop caches */ |