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authorPeter Antoine <peter.antoine@intel.com>2016-08-04 14:39:26 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2016-08-04 16:55:08 +0100
commitcb5d6033a0fd5f45c6e32584ab2d8eed08e6386b (patch)
tree916335f505263719bafbea52de94ca3f7bf6d988 /lib/igt_sysfs.c
parent0dbff43cf683ccfb4603078c67273b10a6f16591 (diff)
igt/gem_mocs_settings: adding RC6 tests
This change adds a RC6 test for the MOCS. The MOCS registers are loaded and saved as part of the RC6 cycle but not all the registers are saved/restored. This tests that those registers are correctly restored. Signed-off-by: Peter Antoine <peter.antoine@intel.com>
Diffstat (limited to 'lib/igt_sysfs.c')
-rw-r--r--lib/igt_sysfs.c36
1 files changed, 36 insertions, 0 deletions
diff --git a/lib/igt_sysfs.c b/lib/igt_sysfs.c
index 6b273456..4dc57365 100644
--- a/lib/igt_sysfs.c
+++ b/lib/igt_sysfs.c
@@ -307,6 +307,42 @@ int igt_sysfs_printf(int dir, const char *attr, const char *fmt, ...)
}
/**
+ * igt_sysfs_get_u32:
+ * @dir: directory for the device from igt_sysfs_open()
+ * @attr: name of the sysfs node to open
+ *
+ * Convenience wrapper to read a unsigned 32bit integer from a sysfs file.
+ *
+ * Returns:
+ * The value read.
+ */
+uint32_t igt_sysfs_get_u32(int dir, const char *attr)
+{
+ uint32_t result;
+
+ if (igt_sysfs_scanf(dir, attr, "%u", &result) != 1)
+ return 0;
+
+ return result;
+}
+
+/**
+ * igt_sysfs_set_u32:
+ * @dir: directory for the device from igt_sysfs_open()
+ * @attr: name of the sysfs node to open
+ * @value: value to set
+ *
+ * Convenience wrapper to write a unsigned 32bit integer to a sysfs file.
+ *
+ * Returns:
+ * True if successfully written
+ */
+bool igt_sysfs_set_u32(int dir, const char *attr, uint32_t value)
+{
+ return igt_sysfs_printf(dir, attr, "%u", value) == 1;
+}
+
+/**
* igt_sysfs_get_boolean:
* @dir: directory for the device from igt_sysfs_open()
* @attr: name of the sysfs node to open