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authorChris Wilson <chris@chris-wilson.co.uk>2010-04-08 11:56:57 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2010-04-08 12:17:31 +0100
commit95374225e865da3a30153f73e8bb536700d15459 (patch)
treeab8797a6f255a0d76e5d8e7439b8fe4a9b34ca90 /lib/intel_batchbuffer.c
parentcd64e193299be4b9733a5e804cedd99e2072830f (diff)
Enable compilation on non-Intel, non-DRM systems.
A few of the tools can be performed post-mortem from a different system, so it is useful to be able to compile those tools on those foreign systems. Obviously, any program to interact with the PCI device or talk to GEM will fail on a non-Intel system. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'lib/intel_batchbuffer.c')
-rw-r--r--lib/intel_batchbuffer.c47
1 files changed, 47 insertions, 0 deletions
diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
index 1e3148ab..ae5150e9 100644
--- a/lib/intel_batchbuffer.c
+++ b/lib/intel_batchbuffer.c
@@ -30,9 +30,13 @@
#include <stdio.h>
#include <string.h>
#include <assert.h>
+
#include "drm.h"
#include "intel_batchbuffer.h"
#include "intel_bufmgr.h"
+#include "intel_chipset.h"
+#include "intel_reg.h"
+#include <i915_drm.h>
void
intel_batchbuffer_reset(struct intel_batchbuffer *batch)
@@ -137,3 +141,46 @@ intel_batchbuffer_data(struct intel_batchbuffer *batch,
memcpy(batch->ptr, data, bytes);
batch->ptr += bytes;
}
+
+void
+intel_copy_bo(struct intel_batchbuffer *batch,
+ drm_intel_bo *dst_bo, drm_intel_bo *src_bo,
+ int width, int height, uint32_t devid)
+{
+ uint32_t src_tiling, dst_tiling, swizzle;
+ uint32_t src_pitch, dst_pitch;
+ uint32_t cmd_bits = 0;
+
+ drm_intel_bo_get_tiling(src_bo, &src_tiling, &swizzle);
+ drm_intel_bo_get_tiling(dst_bo, &dst_tiling, &swizzle);
+
+ src_pitch = width * 4;
+ if (IS_965(devid) && src_tiling != I915_TILING_NONE) {
+ src_pitch /= 4;
+ cmd_bits |= XY_SRC_COPY_BLT_SRC_TILED;
+ }
+
+ dst_pitch = width * 4;
+ if (IS_965(devid) && dst_tiling != I915_TILING_NONE) {
+ dst_pitch /= 4;
+ cmd_bits |= XY_SRC_COPY_BLT_DST_TILED;
+ }
+
+ BEGIN_BATCH(8);
+ OUT_BATCH(XY_SRC_COPY_BLT_CMD |
+ XY_SRC_COPY_BLT_WRITE_ALPHA |
+ XY_SRC_COPY_BLT_WRITE_RGB |
+ cmd_bits);
+ OUT_BATCH((3 << 24) | /* 32 bits */
+ (0xcc << 16) | /* copy ROP */
+ dst_pitch);
+ OUT_BATCH(0); /* dst x1,y1 */
+ OUT_BATCH((height << 16) | width); /* dst x2,y2 */
+ OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
+ OUT_BATCH(0); /* src x1,y1 */
+ OUT_BATCH(src_pitch);
+ OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
+ ADVANCE_BATCH();
+
+ intel_batchbuffer_flush(batch);
+}