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| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2011-09-06 21:16:21 +0200 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2011-09-09 17:24:16 +0200 |
| commit | 49cd753a77ab8ed9194f0e3ac2b5eadc803ef165 (patch) | |
| tree | d0a05099c7cf51a955a2ef32202bb723f22b409f /lib/intel_batchbuffer.h | |
| parent | 2a0b3488a0f3a715d2d654858ba0a638d71366c7 (diff) | |
test/gem_storedw_*: tune some more
MI_*/PIPE_CONTROL writes need to be in DOMAIN_INSTRUCTION, because
that is what mesa uses and I plan to use this to work around a
gen6 ppgtt issue.
Also testing with intentionally b0rked GFX_MODE on my snb shows that
we need to increase the loop counter a bit to reliably hit the tlb
invalidation problem. Test still completes within a few seconds.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'lib/intel_batchbuffer.h')
0 files changed, 0 insertions, 0 deletions