diff options
| author | Damien Lespiau <damien.lespiau@intel.com> | 2015-03-03 14:10:57 +0000 |
|---|---|---|
| committer | Damien Lespiau <damien.lespiau@intel.com> | 2015-03-12 14:19:41 +0000 |
| commit | cbd927cd35473c88bf5e2f5f42e61af612eaa75e (patch) | |
| tree | d2ce9a8e62961658772dfcec47825ea78576be78 /lib/intel_batchbuffer.h | |
| parent | 0c15e068a587fbb144ba6d689b402b95cd51470e (diff) | |
lib/skl: Add gen9 specific igt_blitter_fast_copy()
v2: Adjust for BB handling changes. (Tvrtko Ursulin)
Correct XY_FAST_COPY_DST_TILING_Yf. (Tvrtko Ursulin)
v3: New tiling modes are not defined in the kernel any more. (Tvrtko Ursulin)
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Diffstat (limited to 'lib/intel_batchbuffer.h')
| -rw-r--r-- | lib/intel_batchbuffer.h | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h index 12f7be1c..00d63b7d 100644 --- a/lib/intel_batchbuffer.h +++ b/lib/intel_batchbuffer.h @@ -186,6 +186,18 @@ void intel_copy_bo(struct intel_batchbuffer *batch, long int size); /** + * Yf/Ys tiling + * + * Tiling mode in the I915_TILING_... namespace for new tiling modes which are + * defined in the kernel. (They are not fenceable so the kernel does not need + * to know about them.) + * + * They are to be used the the blitting routines below. + */ +#define I915_TILING_Yf 3 +#define I915_TILING_Ys 4 + +/** * igt_buf: * @bo: underlying libdrm buffer object * @stride: stride of the buffer @@ -210,6 +222,11 @@ struct igt_buf { unsigned igt_buf_width(struct igt_buf *buf); unsigned igt_buf_height(struct igt_buf *buf); +void igt_blitter_fast_copy(struct intel_batchbuffer *batch, + struct igt_buf *src, unsigned src_x, unsigned src_y, + unsigned width, unsigned height, + struct igt_buf *dst, unsigned dst_x, unsigned dst_y); + /** * igt_render_copyfunc_t: * @batch: batchbuffer object |