diff options
| author | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2016-06-23 14:11:58 -0700 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2016-06-28 16:24:18 -0700 |
| commit | 09dc3171a1b3c375efd800a7cb5024a613144689 (patch) | |
| tree | 869cb6fc8b91ec2c2d48966e86cc527d7d90eccc /lib/intel_chipset.h | |
| parent | ba58793e98bcf68088bf45975260422d721dbc8b (diff) | |
lib/intel_chipset: Add more Kabylake PCI IDs.
The spec has been updated adding new PCI IDs.
In parity with kernel:
commit 33d9391d3020e069dca98fa87a604c037beb2b9e
Author: Rodrigo Vivi <rodrigo.vivi@intel.com>
Date: Thu Jun 23 14:50:35 2016 -0700
drm/i915: Add more Kabylake PCI IDs.
v2: Avoid using "H" instead of HALO to keep names uniform - DK.
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'lib/intel_chipset.h')
| -rw-r--r-- | lib/intel_chipset.h | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h index 2f2e4352..23d09190 100644 --- a/lib/intel_chipset.h +++ b/lib/intel_chipset.h @@ -213,7 +213,9 @@ void intel_check_pch(void); #define PCI_CHIP_KABYLAKE_ULT_GT2 0x5916 #define PCI_CHIP_KABYLAKE_ULT_GT1_5 0x5913 #define PCI_CHIP_KABYLAKE_ULT_GT1 0x5906 -#define PCI_CHIP_KABYLAKE_ULT_GT3 0x5926 +#define PCI_CHIP_KABYLAKE_ULT_GT3_0 0x5923 +#define PCI_CHIP_KABYLAKE_ULT_GT3_1 0x5926 +#define PCI_CHIP_KABYLAKE_ULT_GT3_2 0x5927 #define PCI_CHIP_KABYLAKE_ULT_GT2F 0x5921 #define PCI_CHIP_KABYLAKE_ULX_GT1_5 0x5915 #define PCI_CHIP_KABYLAKE_ULX_GT1 0x590E @@ -224,7 +226,8 @@ void intel_check_pch(void); #define PCI_CHIP_KABYLAKE_DT_GT4 0x5932 #define PCI_CHIP_KABYLAKE_HALO_GT2 0x591B #define PCI_CHIP_KABYLAKE_HALO_GT3 0x592B -#define PCI_CHIP_KABYLAKE_HALO_GT1 0x590B +#define PCI_CHIP_KABYLAKE_HALO_GT1_0 0x5908 +#define PCI_CHIP_KABYLAKE_HALO_GT1_1 0x590B #define PCI_CHIP_KABYLAKE_HALO_GT4 0x593B #define PCI_CHIP_KABYLAKE_SRV_GT2 0x591A #define PCI_CHIP_KABYLAKE_SRV_GT3 0x592A @@ -430,7 +433,8 @@ void intel_check_pch(void); (devid) == PCI_CHIP_KABYLAKE_ULT_GT1|| \ (devid) == PCI_CHIP_KABYLAKE_ULX_GT1|| \ (devid) == PCI_CHIP_KABYLAKE_DT_GT1|| \ - (devid) == PCI_CHIP_KABYLAKE_HALO_GT1|| \ + (devid) == PCI_CHIP_KABYLAKE_HALO_GT1_0|| \ + (devid) == PCI_CHIP_KABYLAKE_HALO_GT1_1|| \ (devid) == PCI_CHIP_KABYLAKE_SRV_GT1) #define IS_KBL_GT2(devid) ((devid) == PCI_CHIP_KABYLAKE_ULT_GT2|| \ @@ -441,7 +445,9 @@ void intel_check_pch(void); (devid) == PCI_CHIP_KABYLAKE_SRV_GT2|| \ (devid) == PCI_CHIP_KABYLAKE_WKS_GT2) -#define IS_KBL_GT3(devid) ((devid) == PCI_CHIP_KABYLAKE_ULT_GT3|| \ +#define IS_KBL_GT3(devid) ((devid) == PCI_CHIP_KABYLAKE_ULT_GT3_0|| \ + (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_1|| \ + (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_2|| \ (devid) == PCI_CHIP_KABYLAKE_HALO_GT3|| \ (devid) == PCI_CHIP_KABYLAKE_SRV_GT3) |