diff options
author | Chris Wilson <chris@chris-wilson.co.uk> | 2016-06-29 11:06:09 +0100 |
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committer | Chris Wilson <chris@chris-wilson.co.uk> | 2016-06-30 23:06:51 +0100 |
commit | 37eec6dae6de794ed318c9f7ab615848d8b10820 (patch) | |
tree | b6581ee2d38d7f57d526a17ce0db7d796f9516a7 /lib/intel_chipset.h | |
parent | 83faf2b5fb2937d2b1a3c79c2802e4fce91d8652 (diff) |
intel_chipset: Convert IS_PINEVIEW to device info
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'lib/intel_chipset.h')
-rw-r--r-- | lib/intel_chipset.h | 12 |
1 files changed, 4 insertions, 8 deletions
diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h index 4f532a95..a40a8572 100644 --- a/lib/intel_chipset.h +++ b/lib/intel_chipset.h @@ -111,10 +111,6 @@ void intel_check_pch(void); #define PCI_CHIP_IGD_GM 0xA011 #define PCI_CHIP_IGD_G 0xA001 -#define IS_IGDGM(devid) ((devid) == PCI_CHIP_IGD_GM) -#define IS_IGDG(devid) ((devid) == PCI_CHIP_IGD_G) -#define IS_IGD(devid) (IS_IGDG(devid) || IS_IGDGM(devid)) - #define PCI_CHIP_I965_G 0x29A2 #define PCI_CHIP_I965_Q 0x2992 #define PCI_CHIP_I965_G_1 0x2982 @@ -292,10 +288,6 @@ void intel_check_pch(void); (devid) == PCI_CHIP_I945_GME || \ IS_G33(devid)) -#define IS_G33(devid) ((devid) == PCI_CHIP_G33_G || \ - (devid) == PCI_CHIP_Q33_G || \ - (devid) == PCI_CHIP_Q35_G || IS_IGD(devid)) - #define IS_HSW_GT1(devid) ((devid) == PCI_CHIP_HASWELL_GT1 || \ (devid) == PCI_CHIP_HASWELL_M_GT1 || \ (devid) == PCI_CHIP_HASWELL_S_GT1 || \ @@ -404,6 +396,10 @@ void intel_check_pch(void); #define IS_KBL_GT4(devid) ((devid) == PCI_CHIP_KABYLAKE_HALO_GT4) +#define IS_PINEVIEW(devid) (intel_device_info(devid)->is_pineview) +#define IS_G33(devid) (intel_device_info(devid)->is_bearlake || \ + intel_device_info(devid)->is_pineview) + #define IS_IRONLAKE(devid) (intel_device_info(devid)->is_ironlake) #define IS_ARRANDALE(devid) (intel_device_info(devid)->is_arrandale) #define IS_IVYBRIDGE(devid) (intel_device_info(devid)->is_ivybridge) |