diff options
| author | Ben Widawsky <ben@bwidawsk.net> | 2012-12-03 11:36:46 -0800 |
|---|---|---|
| committer | Ben Widawsky <benjamin.widawsky@intel.com> | 2013-11-06 09:31:46 -0800 |
| commit | a8221a53ecd295747c00f41b1cd6dbd15eec6b93 (patch) | |
| tree | ab506e140582fcab2b15d60653a28093f95e53a1 /lib/intel_chipset.h | |
| parent | f20ac4c8a10995d47a0bd853b3436e8427b58bff (diff) | |
pciid/bdw: Add Broadwell PCI ids
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Diffstat (limited to 'lib/intel_chipset.h')
| -rw-r--r-- | lib/intel_chipset.h | 33 |
1 files changed, 28 insertions, 5 deletions
diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h index f75667b5..e70252a7 100644 --- a/lib/intel_chipset.h +++ b/lib/intel_chipset.h @@ -148,6 +148,12 @@ #define PCI_CHIP_HASWELL_CRW_E_GT1 0x0D0E /* Reserved */ #define PCI_CHIP_HASWELL_CRW_E_GT2 0x0D1E #define PCI_CHIP_HASWELL_CRW_E_GT3 0x0D2E +#define BDW_SPARE 0x2 +#define BDW_ULT 0x6 +#define BDW_HALO 0xb +#define BDW_SERVER 0xa +#define BDW_WORKSTATION 0xd +#define BDW_ULX 0xe #define PCI_CHIP_VALLEYVIEW_PO 0x0f30 /* VLV PO board */ #define PCI_CHIP_VALLEYVIEW_1 0x0f31 @@ -296,10 +302,23 @@ IS_HSW_GT2(devid) || \ IS_HSW_GT3(devid)) +#define IS_BROADWELL(devid) ((((devid) & 0xff00) != 0x1600) ? 0 : \ + ((((devid) & 0x00f0) >> 4) > 3) ? 0 : \ + (((devid) & 0x000f) == BDW_SPARE) ? 1 : \ + (((devid) & 0x000f) == BDW_ULT) ? 1 : \ + (((devid) & 0x000f) == BDW_HALO) ? 1 : \ + (((devid) & 0x000f) == BDW_SERVER) ? 1 : \ + (((devid) & 0x000f) == BDW_WORKSTATION) ? 1 : \ + (((devid) & 0x000f) == BDW_ULX) ? 1 : 0) + + +#define IS_GEN8(devid) IS_BROADWELL(devid) + #define IS_965(devid) (IS_GEN4(devid) || \ IS_GEN5(devid) || \ IS_GEN6(devid) || \ - IS_GEN7(devid)) + IS_GEN7(devid) || \ + IS_GEN8(devid)) #define IS_9XX(devid) (IS_GEN3(devid) || \ IS_GEN4(devid) || \ @@ -312,18 +331,22 @@ IS_GEN4(devid) || \ IS_GEN5(devid) || \ IS_GEN6(devid) || \ - IS_GEN7(devid)) + IS_GEN7(devid) || \ + IS_GEN8(devid)) #define HAS_PCH_SPLIT(devid) (IS_GEN5(devid) || \ IS_GEN6(devid) || \ - IS_IVYBRIDGE(devid) || IS_HASWELL(devid)) + IS_IVYBRIDGE(devid) || IS_HASWELL(devid) || \ + IS_GEN8(devid)) #define HAS_BLT_RING(devid) (IS_GEN6(devid) || \ - IS_GEN7(devid)) + IS_GEN7(devid) || \ + IS_GEN8(devid)) #define HAS_BSD_RING(devid) (IS_GEN5(devid) || \ IS_GEN6(devid) || \ - IS_GEN7(devid)) + IS_GEN7(devid) || \ + IS_GEN8(devid)) #define IS_BROADWATER(devid) ((devid) == PCI_CHIP_I946_GZ || \ (devid) == PCI_CHIP_I965_G_1 || \ |