diff options
| author | Eric Anholt <eric@anholt.net> | 2010-12-16 16:42:52 -0800 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2010-12-16 16:48:29 -0800 |
| commit | 253acc34af6fb9976a8d54991560dec5920af20b (patch) | |
| tree | 9282da20d3e4ee30cec32c52611c1ca2976decd8 /lib/intel_reg.h | |
| parent | 19b412b37cd3474200a2c6fe0cdb11af0c0f98cb (diff) | |
intel_disable_clock_gating: New tool for turning off clock gating on ILK.
This is something I sometimes want to do in testing, to see if a
mystery bug (say, 29172) is due to broken clock gating. Sadly, in
this case it isn't. Note that it isn't supported on non-ILK chipsets
yet.
Diffstat (limited to 'lib/intel_reg.h')
| -rw-r--r-- | lib/intel_reg.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/lib/intel_reg.h b/lib/intel_reg.h index 44055fab..eb09a89f 100644 --- a/lib/intel_reg.h +++ b/lib/intel_reg.h @@ -1566,6 +1566,13 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define ADPA_HSYNC_ACTIVE_HIGH (1<<3) #define ADPA_HSYNC_ACTIVE_LOW 0 +#define PCH_DSPCLK_GATE_D 0x42020 +#define PCH_DSPRAMCLK_GATE_D 0x42024 +#define PCH_3DCGDIS0 0x46020 +#define PCH_3DCGDIS1 0x46024 +#define PCH_3DRAMCGDIS0 0x46028 +#define SOUTH_DSPCLK_GATE_D 0xc2020 + #define CPU_eDP_A 0x64000 #define PCH_DP_B 0xe4100 #define PCH_DP_C 0xe4200 |