diff options
| author | Damien Lespiau <damien.lespiau@intel.com> | 2015-03-03 14:10:57 +0000 |
|---|---|---|
| committer | Damien Lespiau <damien.lespiau@intel.com> | 2015-03-12 14:19:41 +0000 |
| commit | cbd927cd35473c88bf5e2f5f42e61af612eaa75e (patch) | |
| tree | d2ce9a8e62961658772dfcec47825ea78576be78 /lib/intel_reg.h | |
| parent | 0c15e068a587fbb144ba6d689b402b95cd51470e (diff) | |
lib/skl: Add gen9 specific igt_blitter_fast_copy()
v2: Adjust for BB handling changes. (Tvrtko Ursulin)
Correct XY_FAST_COPY_DST_TILING_Yf. (Tvrtko Ursulin)
v3: New tiling modes are not defined in the kernel any more. (Tvrtko Ursulin)
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Diffstat (limited to 'lib/intel_reg.h')
| -rw-r--r-- | lib/intel_reg.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/lib/intel_reg.h b/lib/intel_reg.h index ade1c0cc..0ffa803d 100644 --- a/lib/intel_reg.h +++ b/lib/intel_reg.h @@ -2514,6 +2514,24 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define XY_MONO_SRC_BLT_WRITE_ALPHA (1<<21) #define XY_MONO_SRC_BLT_WRITE_RGB (1<<20) +#define XY_FAST_COPY_BLT ((2<<29)|(0x42<<22)|0x8) +/* dword 0 */ +#define XY_FAST_COPY_SRC_TILING_LINEAR (0 << 20) +#define XY_FAST_COPY_SRC_TILING_X (1 << 20) +#define XY_FAST_COPY_SRC_TILING_Yb_Yf (2 << 20) +#define XY_FAST_COPY_SRC_TILING_Ys (3 << 20) +#define XY_FAST_COPY_SRC_HORIZONTAL_ALIGNMENT(n) (n << 17) +#define XY_FAST_COPY_SRC_VERTICAL_ALIGNMENT(n) (n << 15) +#define XY_FAST_COPY_DST_TILING_X (1 << 13) +#define XY_FAST_COPY_DST_TILING_Yb_Yf (2 << 13) +#define XY_FAST_COPY_DST_TILING_Ys (3 << 13) +#define XY_FAST_COPY_DST_HORIZONTAL_ALIGNMENT(n) (n << 10) +#define XY_FAST_COPY_DST_VERTICAL_ALIGNMENT(n) (n << 8) +/* dword 1 */ +#define XY_FAST_COPY_SRC_TILING_Yf (1 << 31) +#define XY_FAST_COPY_DST_TILING_Yf (1 << 30) +#define XY_FAST_COPY_COLOR_DEPTH_32 (3 << 24) + #define MI_STORE_DWORD_IMM ((0x20<<23)|2) #define MI_MEM_VIRTUAL (1 << 22) /* 965+ only */ |