diff options
| author | Lukasz Kalamarz <lukasz.kalamarz@intel.com> | 2018-05-25 09:15:33 +0200 |
|---|---|---|
| committer | Katarzyna Dec <katarzyna.dec@intel.com> | 2018-06-05 08:37:31 +0200 |
| commit | f506fd512eaff6fab8846c01c918cca450ddc8ef (patch) | |
| tree | ab64157321a6089d76b96c2feb122482780ed26d /lib/rendercopy_gen9.c | |
| parent | 3419ecf643dad9a2f22db9410234d879be4f827c (diff) | |
lib: Rename all surfaceformat calls in libs
This patch is renaming all surfaceformat registers to use
names introduced in surfaceformat.h instead of using
per gen definitions
v2: Drop GEN_ from register names. Applied that to
other libs.
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Diffstat (limited to 'lib/rendercopy_gen9.c')
| -rw-r--r-- | lib/rendercopy_gen9.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c index 42b12eb5..ea69b95f 100644 --- a/lib/rendercopy_gen9.c +++ b/lib/rendercopy_gen9.c @@ -163,7 +163,7 @@ gen8_bind_buf(struct intel_batchbuffer *batch, struct igt_buf *buf, annotation_add_state(&aub_annotations, AUB_TRACE_SURFACE_STATE, offset, sizeof(*ss)); - ss->ss0.surface_type = GEN6_SURFACE_2D; + ss->ss0.surface_type = SURFACE_2D; ss->ss0.surface_format = format; ss->ss0.render_cache_read_write = 1; ss->ss0.vertical_alignment = 1; /* align 4 */ @@ -206,9 +206,9 @@ gen8_bind_surfaces(struct intel_batchbuffer *batch, offset, 8); binding_table[0] = - gen8_bind_buf(batch, dst, GEN6_SURFACEFORMAT_B8G8R8A8_UNORM, 1); + gen8_bind_buf(batch, dst, SURFACEFORMAT_B8G8R8A8_UNORM, 1); binding_table[1] = - gen8_bind_buf(batch, src, GEN6_SURFACEFORMAT_B8G8R8A8_UNORM, 0); + gen8_bind_buf(batch, src, SURFACEFORMAT_B8G8R8A8_UNORM, 0); return offset; } @@ -315,7 +315,7 @@ gen6_emit_vertex_elements(struct intel_batchbuffer *batch) { * We don't really know or care what they do. */ OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | - GEN6_SURFACEFORMAT_R32G32B32A32_FLOAT << VE0_FORMAT_SHIFT | + SURFACEFORMAT_R32G32B32A32_FLOAT << VE0_FORMAT_SHIFT | 0 << VE0_OFFSET_SHIFT); /* we specify 0, but it's really does not exist */ OUT_BATCH(GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT | @@ -329,7 +329,7 @@ gen6_emit_vertex_elements(struct intel_batchbuffer *batch) { * for doing this though. */ OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | - GEN6_SURFACEFORMAT_R16G16_SSCALED << VE0_FORMAT_SHIFT | + SURFACEFORMAT_R16G16_SSCALED << VE0_FORMAT_SHIFT | 0 << VE0_OFFSET_SHIFT); /* offsets vb in bytes */ OUT_BATCH(GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT | @@ -341,7 +341,7 @@ gen6_emit_vertex_elements(struct intel_batchbuffer *batch) { * from the source buffer. */ OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | - GEN6_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT | + SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT | 4 << VE0_OFFSET_SHIFT); /* offset vb in bytes */ OUT_BATCH(GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT | |