diff options
author | Xiang, Haihao <haihao.xiang@intel.com> | 2014-04-11 21:57:20 +0800 |
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committer | Damien Lespiau <damien.lespiau@intel.com> | 2014-09-30 12:21:03 +0100 |
commit | fe4e4c176c7d3ae9ba59d4a40f12f83a29b6151c (patch) | |
tree | bf608e7c8647adebef7da7e4c261cc4d882eae8f /lib/rendercopy_gen9.c | |
parent | 5b46cd335d8323c8b0c48c2c004f983605e25433 (diff) |
rendercopy/skl: Set the URB VS start address to 4
A value less than 4 might result in GPU hang on simulation
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@linux.intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Diffstat (limited to 'lib/rendercopy_gen9.c')
-rw-r--r-- | lib/rendercopy_gen9.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c index 8621f7fc..92265c16 100644 --- a/lib/rendercopy_gen9.c +++ b/lib/rendercopy_gen9.c @@ -558,7 +558,7 @@ gen7_emit_urb(struct intel_batchbuffer *batch) { /* XXX: Min valid values from mesa */ const int vs_entries = 64; const int vs_size = 2; - const int vs_start = 2; + const int vs_start = 4; OUT_BATCH(GEN7_3DSTATE_URB_VS); OUT_BATCH(vs_entries | ((vs_size - 1) << 16) | (vs_start << 25)); |