diff options
| author | Chris Wilson <chris.p.wilson@intel.com> | 2022-06-07 16:39:53 +0200 |
|---|---|---|
| committer | Matthew Auld <matthew.auld@intel.com> | 2022-06-09 10:35:40 +0100 |
| commit | a2142371c1c58975726e2a259174b61070799ccf (patch) | |
| tree | f3e5c6f65796f959ed5c7ccf61268359bc744e3e /lib | |
| parent | 722f32da447888645bbbe6e96728d0f9d2e6d09d (diff) | |
i915/gem_exec_balancer: Fix execution of parallel-submit on dg2+
From dg2, there are multiple compute engines which conflict with the
parallel-submit restriction; check for the illegal engine class prior to
running the test.
And from dg2, MI_ATOMIC is only valid for use with system memory for
INC, DEC and MOV operation, not the ADD used in the test workload.
Replace the ADD+1 with an INC, so that the same workload runs on all
platforms.
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6157
Signed-off-by: Chris Wilson <chris.p.wilson@intel.com>
Reviewed-by: Nirmoy Das <nirmoy.das@intel.com>
Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/intel_reg.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/intel_reg.h b/lib/intel_reg.h index cb627288..e26ee82a 100644 --- a/lib/intel_reg.h +++ b/lib/intel_reg.h @@ -2645,8 +2645,9 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define STATE3D_COLOR_FACTOR ((0x3<<29)|(0x1d<<24)|(0x01<<16)) /* Atomics */ -#define MI_ATOMIC ((0x2f << 23) | 2) +#define MI_ATOMIC ((0x2f << 23) | 1) #define MI_ATOMIC_INLINE_DATA (1 << 18) +#define MI_ATOMIC_INC (0x5 << 8) #define MI_ATOMIC_ADD (0x7 << 8) /* Batch */ |