diff options
| author | Ben Widawsky <benjamin.widawsky@intel.com> | 2013-10-08 15:02:07 -0700 |
|---|---|---|
| committer | Ben Widawsky <benjamin.widawsky@intel.com> | 2013-11-06 09:34:35 -0800 |
| commit | f4dfa37e8578419b94a7c84fbcea7d4b70aa68b9 (patch) | |
| tree | 61de7af4da15cdedd65af14d20081d0c6e0a9913 /lib | |
| parent | 26f09a91897f6ad66b8fb8e0e5afb4c95954fbd2 (diff) | |
bdw: Update obvious missing blit support
This provides a macro that allows us to update all the arbitrary blit
commands we have stuck throughout the code. It assumes we don't actually
use 64b relocs (which is currently true). This also allows us to easily find
all the areas we need to update later when we really use the upper dword.
This block was done mostly with a sed job, and represents the easier
in test blit implementations.
v2 by Oscar: s/OUT_BATCH/BEGIN_BATCH in BLIT_COPY_BATCH_START
CC: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/i830_reg.h | 2 | ||||
| -rw-r--r-- | lib/intel_batchbuffer.c | 5 | ||||
| -rw-r--r-- | lib/intel_batchbuffer.h | 22 | ||||
| -rw-r--r-- | lib/intel_reg.h | 2 |
4 files changed, 27 insertions, 4 deletions
diff --git a/lib/i830_reg.h b/lib/i830_reg.h index 4d4e6188..394e74e7 100644 --- a/lib/i830_reg.h +++ b/lib/i830_reg.h @@ -80,7 +80,7 @@ #define XY_SETUP_CLIP_BLT_CMD ((2<<29)|(3<<22)|1) -#define XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22)|6) +#define XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22)) #define XY_SRC_COPY_BLT_WRITE_ALPHA (1<<21) #define XY_SRC_COPY_BLT_WRITE_RGB (1<<20) #define XY_SRC_COPY_BLT_SRC_TILED (1<<15) diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c index c798c212..e284d487 100644 --- a/lib/intel_batchbuffer.c +++ b/lib/intel_batchbuffer.c @@ -239,17 +239,18 @@ intel_blt_copy(struct intel_batchbuffer *batch, CHECK_RANGE(src_pitch) && CHECK_RANGE(dst_pitch)); #undef CHECK_RANGE - BEGIN_BATCH(8); - OUT_BATCH(XY_SRC_COPY_BLT_CMD | cmd_bits); + BLIT_COPY_BATCH_START(batch->devid, cmd_bits); OUT_BATCH((br13_bits) | (0xcc << 16) | /* copy ROP */ dst_pitch); OUT_BATCH((dst_y1 << 16) | dst_x1); /* dst x1,y1 */ OUT_BATCH(((dst_y1 + height) << 16) | (dst_x1 + width)); /* dst x2,y2 */ OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + BLIT_RELOC_UDW(batch->devid); OUT_BATCH((src_y1 << 16) | src_x1); /* src x1,y1 */ OUT_BATCH(src_pitch); OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0); + BLIT_RELOC_UDW(batch->devid); ADVANCE_BATCH(); intel_batchbuffer_flush(batch); diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h index 4eee7ea0..a7999698 100644 --- a/lib/intel_batchbuffer.h +++ b/lib/intel_batchbuffer.h @@ -96,6 +96,28 @@ intel_batchbuffer_require_space(struct intel_batchbuffer *batch, #define ADVANCE_BATCH() do { \ } while(0) +#define BLIT_COPY_BATCH_START(devid, flags) do { \ + if (intel_gen(devid) >= 8) { \ + BEGIN_BATCH(10); \ + OUT_BATCH(XY_SRC_COPY_BLT_CMD | \ + XY_SRC_COPY_BLT_WRITE_ALPHA | \ + XY_SRC_COPY_BLT_WRITE_RGB | \ + flags | 8); \ + } else { \ + BEGIN_BATCH(8); \ + OUT_BATCH(XY_SRC_COPY_BLT_CMD | \ + XY_SRC_COPY_BLT_WRITE_ALPHA | \ + XY_SRC_COPY_BLT_WRITE_RGB | \ + flags | 6); \ + } \ +} while(0) + +#define BLIT_RELOC_UDW(devid) do { \ + if (intel_gen(devid) >= 8) { \ + OUT_BATCH(0); \ + } \ +} while(0) + void intel_blt_copy(struct intel_batchbuffer *batch, drm_intel_bo *src_bo, int src_x1, int src_y1, int src_pitch, diff --git a/lib/intel_reg.h b/lib/intel_reg.h index d70b94a3..e545bfa2 100644 --- a/lib/intel_reg.h +++ b/lib/intel_reg.h @@ -2713,7 +2713,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define XY_SETUP_CLIP_BLT_CMD ((2<<29)|(3<<22)|1) -#define XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22)|6) +#define XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22)) #define XY_SRC_COPY_BLT_WRITE_ALPHA (1<<21) #define XY_SRC_COPY_BLT_WRITE_RGB (1<<20) #define XY_SRC_COPY_BLT_SRC_TILED (1<<15) |