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authorTvrtko Ursulin <tvrtko.ursulin@intel.com>2017-09-13 18:28:24 +0100
committerTvrtko Ursulin <tvrtko.ursulin@intel.com>2017-11-22 11:19:08 +0000
commit0d8385a7ad670e96dadef6e04e7541a64b637406 (patch)
treed6c628807fb7b30b7141ffcf0a3ef812112da422 /overlay
parent19c99246827587a9570a1aa71ee1e49c39acaa8d (diff)
intel-gpu-overlay: Catch-up to new i915 PMU
v2: Update for i915 changes. v3: Use 1eN for large numbers. (Chris Wilson) v4: Update for upstream engine class enum. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'overlay')
-rw-r--r--overlay/gem-interrupts.c2
-rw-r--r--overlay/gpu-freq.c8
-rw-r--r--overlay/gpu-top.c68
-rw-r--r--overlay/power.c4
-rw-r--r--overlay/rc6.c20
5 files changed, 54 insertions, 48 deletions
diff --git a/overlay/gem-interrupts.c b/overlay/gem-interrupts.c
index 5bd8656e..0233fbb0 100644
--- a/overlay/gem-interrupts.c
+++ b/overlay/gem-interrupts.c
@@ -113,7 +113,7 @@ int gem_interrupts_init(struct gem_interrupts *irqs)
{
memset(irqs, 0, sizeof(*irqs));
- irqs->fd = perf_i915_open(I915_PERF_INTERRUPTS);
+ irqs->fd = perf_i915_open(I915_PMU_INTERRUPTS);
if (irqs->fd < 0 && interrupts_read() < 0)
irqs->error = ENODEV;
diff --git a/overlay/gpu-freq.c b/overlay/gpu-freq.c
index 76c5ed9a..0d803259 100644
--- a/overlay/gpu-freq.c
+++ b/overlay/gpu-freq.c
@@ -37,8 +37,8 @@ static int perf_open(void)
{
int fd;
- fd = perf_i915_open_group(I915_PERF_ACTUAL_FREQUENCY, -1);
- if (perf_i915_open_group(I915_PERF_REQUESTED_FREQUENCY, fd) < 0) {
+ fd = perf_i915_open_group(I915_PMU_ACTUAL_FREQUENCY, -1);
+ if (perf_i915_open_group(I915_PMU_REQUESTED_FREQUENCY, fd) < 0) {
close(fd);
fd = -1;
}
@@ -176,8 +176,8 @@ int gpu_freq_update(struct gpu_freq *gf)
return EAGAIN;
}
- gf->current = (s->act - d->act) / d_time;
- gf->request = (s->req - d->req) / d_time;
+ gf->current = (s->act - d->act) * 1e9 / d_time;
+ gf->request = (s->req - d->req) * 1e9 / d_time;
}
return 0;
diff --git a/overlay/gpu-top.c b/overlay/gpu-top.c
index 812f47d5..61b8f62f 100644
--- a/overlay/gpu-top.c
+++ b/overlay/gpu-top.c
@@ -43,49 +43,57 @@
#define RING_WAIT (1<<11)
#define RING_WAIT_SEMAPHORE (1<<10)
-#define __I915_PERF_RING(n) (4*n)
-#define I915_PERF_RING_BUSY(n) (__I915_PERF_RING(n) + 0)
-#define I915_PERF_RING_WAIT(n) (__I915_PERF_RING(n) + 1)
-#define I915_PERF_RING_SEMA(n) (__I915_PERF_RING(n) + 2)
-
static int perf_init(struct gpu_top *gt)
{
- const char *names[] = {
- "RCS",
- "BCS",
- "VCS0",
- "VCS1",
- NULL,
+ struct engine_desc {
+ unsigned class, inst;
+ const char *name;
+ } *d, engines[] = {
+ { I915_ENGINE_CLASS_RENDER, 0, "rcs0" },
+ { I915_ENGINE_CLASS_COPY, 0, "bcs0" },
+ { I915_ENGINE_CLASS_VIDEO, 0, "vcs0" },
+ { I915_ENGINE_CLASS_VIDEO, 1, "vcs1" },
+ { I915_ENGINE_CLASS_VIDEO_ENHANCE, 0, "vecs0" },
+ { 0, 0, NULL }
};
- int n;
- gt->fd = perf_i915_open_group(I915_PERF_RING_BUSY(0), -1);
+ d = &engines[0];
+
+ gt->fd = perf_i915_open_group(I915_PMU_ENGINE_BUSY(d->class, d->inst),
+ -1);
if (gt->fd < 0)
return -1;
- if (perf_i915_open_group(I915_PERF_RING_WAIT(0), gt->fd) >= 0)
+ if (perf_i915_open_group(I915_PMU_ENGINE_WAIT(d->class, d->inst),
+ gt->fd) >= 0)
gt->have_wait = 1;
- if (perf_i915_open_group(I915_PERF_RING_SEMA(0), gt->fd) >= 0)
+ if (perf_i915_open_group(I915_PMU_ENGINE_SEMA(d->class, d->inst),
+ gt->fd) >= 0)
gt->have_sema = 1;
- gt->ring[0].name = names[0];
+ gt->ring[0].name = d->name;
gt->num_rings = 1;
- for (n = 1; names[n]; n++) {
- if (perf_i915_open_group(I915_PERF_RING_BUSY(n), gt->fd) >= 0) {
- if (gt->have_wait &&
- perf_i915_open_group(I915_PERF_RING_WAIT(n),
- gt->fd) < 0)
- return -1;
-
- if (gt->have_sema &&
- perf_i915_open_group(I915_PERF_RING_SEMA(n),
- gt->fd) < 0)
- return -1;
-
- gt->ring[gt->num_rings++].name = names[n];
- }
+ for (d++; d->name; d++) {
+ if (perf_i915_open_group(I915_PMU_ENGINE_BUSY(d->class,
+ d->inst),
+ gt->fd) < 0)
+ continue;
+
+ if (gt->have_wait &&
+ perf_i915_open_group(I915_PMU_ENGINE_WAIT(d->class,
+ d->inst),
+ gt->fd) < 0)
+ return -1;
+
+ if (gt->have_sema &&
+ perf_i915_open_group(I915_PMU_ENGINE_SEMA(d->class,
+ d->inst),
+ gt->fd) < 0)
+ return -1;
+
+ gt->ring[gt->num_rings++].name = d->name;
}
return 0;
diff --git a/overlay/power.c b/overlay/power.c
index dd4aec6b..805f4ca7 100644
--- a/overlay/power.c
+++ b/overlay/power.c
@@ -45,9 +45,7 @@ int power_init(struct power *power)
memset(power, 0, sizeof(*power));
- power->fd = perf_i915_open(I915_PERF_ENERGY);
- if (power->fd != -1)
- return 0;
+ power->fd = -1;
sprintf(buf, "%s/i915_energy_uJ", debugfs_dri_path);
fd = open(buf, 0);
diff --git a/overlay/rc6.c b/overlay/rc6.c
index 46c975a5..8977f099 100644
--- a/overlay/rc6.c
+++ b/overlay/rc6.c
@@ -43,15 +43,15 @@ static int perf_open(unsigned *flags)
{
int fd;
- fd = perf_i915_open_group(I915_PERF_RC6_RESIDENCY, -1);
+ fd = perf_i915_open_group(I915_PMU_RC6_RESIDENCY, -1);
if (fd < 0)
return -1;
*flags |= RC6;
- if (perf_i915_open_group(I915_PERF_RC6p_RESIDENCY, fd) >= 0)
+ if (perf_i915_open_group(I915_PMU_RC6p_RESIDENCY, fd) >= 0)
*flags |= RC6p;
- if (perf_i915_open_group(I915_PERF_RC6pp_RESIDENCY, fd) >= 0)
+ if (perf_i915_open_group(I915_PMU_RC6pp_RESIDENCY, fd) >= 0)
*flags |= RC6pp;
return fd;
@@ -132,11 +132,11 @@ int rc6_update(struct rc6 *rc6)
len = 2;
if (rc6->flags & RC6)
- s->rc6_residency = data[len++];
+ s->rc6_residency = data[len++] / 1e6;
if (rc6->flags & RC6p)
- s->rc6p_residency = data[len++];
+ s->rc6p_residency = data[len++] / 1e6;
if (rc6->flags & RC6pp)
- s->rc6pp_residency = data[len++];
+ s->rc6pp_residency = data[len++] / 1e6;
}
if (rc6->count == 1)
@@ -149,14 +149,14 @@ int rc6_update(struct rc6 *rc6)
}
d_rc6 = s->rc6_residency - d->rc6_residency;
- rc6->rc6 = (100 * d_rc6 + d_time/2) / d_time;
+ rc6->rc6 = 100 * d_rc6 / d_time;
d_rc6p = s->rc6p_residency - d->rc6p_residency;
- rc6->rc6p = (100 * d_rc6p + d_time/2) / d_time;
+ rc6->rc6p = 100 * d_rc6p / d_time;
d_rc6pp = s->rc6pp_residency - d->rc6pp_residency;
- rc6->rc6pp = (100 * d_rc6pp + d_time/2) / d_time;
+ rc6->rc6pp = 100 * d_rc6pp / d_time;
- rc6->rc6_combined = (100 * (d_rc6 + d_rc6p + d_rc6pp) + d_time/2) / d_time;
+ rc6->rc6_combined = 100 * (d_rc6 + d_rc6p + d_rc6pp) / d_time;
return 0;
}