diff options
| author | Dominik Zeromski <dominik.zeromski@intel.com> | 2015-07-17 11:25:43 +0200 |
|---|---|---|
| committer | Thomas Wood <thomas.wood@intel.com> | 2015-07-20 18:13:37 +0100 |
| commit | ed816d560ce5a1d80a005a452ee0e4295ac1698f (patch) | |
| tree | bd5930ade869d3425d12ce5a3fc810a257994820 /shaders | |
| parent | 3c294a8fa3a3692bab5abe579375edf96ee3b081 (diff) | |
lib: Move gpgpu_fill code to separate file
The gpgpu fill utility functions are used in separate test so it's
logical to keep them in separate file. This is similar to what media
spin test did in the past.
Functionally only gpgpu kernel changed. Send instruction payload size
was reduced. Since offset is incremented by 0x10 bytes there is no point
in using larger writes.
Cc: Thomas Wood <thomas.wood@intel.com>
Signed-off-by: Dominik Zeromski <dominik.zeromski@intel.com>
[Thomas: Fix typo of gpgpu_fill.h in Makefile.sources]
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
Diffstat (limited to 'shaders')
| -rw-r--r-- | shaders/gpgpu/gpgpu_fill.gxa | 14 |
1 files changed, 1 insertions, 13 deletions
diff --git a/shaders/gpgpu/gpgpu_fill.gxa b/shaders/gpgpu/gpgpu_fill.gxa index fc309f36..34d473c1 100644 --- a/shaders/gpgpu/gpgpu_fill.gxa +++ b/shaders/gpgpu/gpgpu_fill.gxa @@ -26,25 +26,13 @@ mov(2) g4.0<1>UD ORIG {align1}; mov(1) g4.8<1>UD 0x0000000fUD {align1}; mov(16) g5.0<1>UD COLORUD {align1 compr}; -mov(16) g7.0<1>UD COLORUD {align1 compr}; -mov(16) g9.0<1>UD COLORUD {align1 compr}; -mov(16) g11.0<1>UD COLORUD {align1 compr}; /* - * comment out the following instruction on Gen7 * write(0, 0, 10, 12) * 10: media_block_write * 12: data cache data port 1 */ -send(16) 4 acc0<1>UW null write(0, 0, 10, 12) mlen 9 rlen 0 {align1}; - -/* - * uncomment the following instruction on Gen7 - * write(0, 0, 10, 0) - * 10: media_block_write - * 0: reander cache data port - */ -/* send(16) 4 acc0<1>UW null write(0, 0, 10, 0) mlen 9 rlen 0 {align1}; */ +send(16) 4 acc0<1>UW null write(0, 0, 10, 12) mlen 3 rlen 0 {align1}; /* EOT */ mov(8) g112.0<1>UD g0.0<8,8,1>UD {align1}; |