igt/gen7_forcewake_mt: Mark the mmio register as volatile

Prevent the compiler from caching reads/writes to the hw register as we
do want to perform mmio.

Whilst fixing up the mmio access, also ensure that we do not leave the
test with any other bits still set in the forcewake register to prevent
affecting other tests, as spotted by Tvrtko.

v2: Use intel_mmio_use_pci_bar() rather open code the ioremap
v3: Flip igt_wait() checking as it returns true on success, not errno.
v4: Hohum, the mmio bug affects FORCEWAKE_MT as well.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

0 files changed, 0 insertions, 0 deletions