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authorTiago Vignatti <tiago.vignatti@intel.com>2015-12-11 18:50:35 -0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2016-02-11 18:16:12 +0100
commit35debab2d9690aa6c26528358e882168e90dcb2b (patch)
treeb590b7ab62d24c03eec2f0e9857bf45229248c98 /tests/prime_mmap.c
parent4edfa09ae4c184177389e339c57d090914936421 (diff)
lib: Add prime_sync_start and prime_sync_end helpers
This patch adds dma-buf mmap synchronization ioctls that can be used by tests for cache coherency management e.g. when CPU and GPU domains are being accessed through dma-buf at the same time. v7: add sync invalid flags test. Signed-off-by: Tiago Vignatti <tiago.vignatti@intel.com> Reviewed-by: Stéphane Marchesin <marcheu@chromium.org> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Diffstat (limited to 'tests/prime_mmap.c')
-rw-r--r--tests/prime_mmap.c25
1 files changed, 25 insertions, 0 deletions
diff --git a/tests/prime_mmap.c b/tests/prime_mmap.c
index 269ada6d..29a0cfd5 100644
--- a/tests/prime_mmap.c
+++ b/tests/prime_mmap.c
@@ -401,6 +401,30 @@ test_errors(void)
gem_close(fd, handle);
}
+/* Test for invalid flags on sync ioctl */
+static void
+test_invalid_sync_flags(void)
+{
+ int i, dma_buf_fd;
+ uint32_t handle;
+ struct local_dma_buf_sync sync;
+ int invalid_flags[] = {-1,
+ 0x00,
+ LOCAL_DMA_BUF_SYNC_RW + 1,
+ LOCAL_DMA_BUF_SYNC_VALID_FLAGS_MASK + 1};
+
+ handle = gem_create(fd, BO_SIZE);
+ dma_buf_fd = prime_handle_to_fd(fd, handle);
+ for (i = 0; i < sizeof(invalid_flags) / sizeof(invalid_flags[0]); i++) {
+ memset(&sync, 0, sizeof(sync));
+ sync.flags = invalid_flags[i];
+
+ drmIoctl(dma_buf_fd, LOCAL_DMA_BUF_IOCTL_SYNC, &sync);
+ igt_assert_eq(errno, EINVAL);
+ errno = 0;
+ }
+}
+
static void
test_aperture_limit(void)
{
@@ -473,6 +497,7 @@ igt_main
{ "test_dup", test_dup },
{ "test_userptr", test_userptr },
{ "test_errors", test_errors },
+ { "test_invalid_sync_flags", test_invalid_sync_flags },
{ "test_aperture_limit", test_aperture_limit },
};
int i;