diff options
| author | Lu, Han <han.lu@intel.com> | 2015-06-25 14:39:33 +0800 |
|---|---|---|
| committer | Thomas Wood <thomas.wood@intel.com> | 2015-10-14 15:45:23 +0100 |
| commit | 3e9726b33736f7fd7a349785ab6693e33647240a (patch) | |
| tree | b3bd4d58a511c69c01631faf34e1711ac785c160 /tools/intel_audio_dump.c | |
| parent | f52e7ec7876603b4edb0bff412255f8f1624ecc4 (diff) | |
tools/intel_audio_dump: add support for Broxton
This patch adds support for dumping audio registers of Broxton.
Signed-off-by: Lu, Han <han.lu@intel.com>
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
Diffstat (limited to 'tools/intel_audio_dump.c')
| -rw-r--r-- | tools/intel_audio_dump.c | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/tools/intel_audio_dump.c b/tools/intel_audio_dump.c index d4479029..8c24230d 100644 --- a/tools/intel_audio_dump.c +++ b/tools/intel_audio_dump.c @@ -2200,7 +2200,7 @@ static void dump_hsw_plus(void) dump_aud_reg(AUD_TCA_EDID_DATA, "Audio EDID Data Block - Transcoder A"); dump_aud_reg(AUD_TCB_EDID_DATA, "Audio EDID Data Block - Transcoder B"); dump_aud_reg(AUD_TCC_EDID_DATA, "Audio EDID Data Block - Transcoder C"); - if (IS_SKYLAKE(devid)) + if (IS_GEN9(devid)) dump_aud_reg(AUD_FREQ_CNTRL, "Audio BCLK Frequency Control"); dump_aud_reg(AUD_TCA_INFOFR, "Audio Widget Data Island Packet - Transcoder A"); dump_aud_reg(AUD_TCB_INFOFR, "Audio Widget Data Island Packet - Transcoder B"); @@ -2232,7 +2232,7 @@ static void dump_hsw_plus(void) dump_aud_reg(AUD_TCA_M_CTS, "Audio M CTS Read Back Transcoder A"); dump_aud_reg(AUD_TCB_M_CTS, "Audio M CTS Read Back Transcoder B"); dump_aud_reg(AUD_TCC_M_CTS, "Audio M CTS Read Back Transcoder C"); - if (IS_SKYLAKE(devid)) { + if (IS_GEN9(devid)) { dump_aud_reg(AUD_HDA_DMA_REG, "Audio HD Audio DMA Control Register"); dump_aud_reg(AUD_HDA_LPIB0_REG, "Audio HD Audio Stream0 Link Position in Buffer"); dump_aud_reg(AUD_HDA_LPIB1_REG, "Audio HD Audio Stream1 Link Position in Buffer"); @@ -2331,7 +2331,7 @@ static void dump_hsw_plus(void) dword = read_aud_reg(AUD_FREQ_CNTRL); printf("AUD_FREQ_CNTRL Audio BCLK Frequency Control: %08x\n", dword); - if (IS_SKYLAKE(devid)) + if (IS_GEN9(devid)) parse_skl_audio_freq_cntrl_reg(dword); } @@ -2479,11 +2479,12 @@ int main(int argc, char **argv) if (IS_VALLEYVIEW(devid)) { printf("Valleyview audio registers:\n\n"); dump_ironlake(); - } else if (IS_SKYLAKE(devid) + } else if (IS_GEN9(devid) || IS_BROADWELL(devid) || IS_HASWELL(devid)) { printf("%s audio registers:\n\n", - IS_SKYLAKE(devid) ? "Skylake" : - (IS_BROADWELL(devid) ? "Broadwell" : "Haswell")); + IS_BROXTON(devid) ? "Broxton" : + (IS_SKYLAKE(devid) ? "Skylake" : + (IS_BROADWELL(devid) ? "Broadwell" : "Haswell"))); dump_hsw_plus(); } else if (IS_GEN6(devid) || IS_GEN7(devid) || getenv("HAS_PCH_SPLIT")) { |