tools/intel_vbt_decode: remove unused definitions from intel_bios.h

This is prep work for refactoring VBT definitions.

Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

1 files changed, 0 insertions, 268 deletions

diff --git a/tools/intel_bios.h b/tools/intel_bios.h
index f2ccb55a..c9980310 100644
--- a/tools/intel_bios.h
+++ b/tools/intel_bios.h
@@ -132,20 +132,6 @@ struct bdb_general_features {
 	unsigned char rsvd11:2;	/* finish byte */
 } __attribute__ ((packed));
 
-#define GPIO_PIN_NONE		0x00	/* "N/A" */
-#define	GPIO_PIN_I2C		0x01	/* "I2C GPIO pins" */
-#define	GPIO_PIN_CRT_DDC	0x02	/* "Analog CRT DDC GPIO pins" */
-/* 915+ */
-#define	GPIO_PIN_LVDS		0x03	/* "Integrated LVDS DDC GPIO pins" */
-#define	GPIO_PIN_SDVO_I2C	0x05	/* "sDVO I2C GPIO pins" */
-#define	GPIO_PIN_SDVO_DDC1	0x1D	/* "SDVO DDC1 GPIO pins" */
-#define	GPIO_PIN_SDVO_DDC2	0x2D	/* "SDVO DDC2 GPIO pins" */
-/* pre-915 */
-#define	GPIO_PIN_DVI_LVDS	0x03	/* "DVI/LVDS DDC GPIO pins" */
-#define	GPIO_PIN_ADD_I2C	0x05	/* "ADDCARD I2C GPIO pins" */
-#define	GPIO_PIN_ADD_DDC	0x04	/* "ADDCARD DDC GPIO pins" */
-#define	GPIO_PIN_ADD_DDC_I2C	0x06	/* "ADDCARD DDC/I2C GPIO pins" */
-
 #define DEVICE_HANDLE_CRT	0x01
 #define DEVICE_HANDLE_EFP1	0x04
 #define DEVICE_HANDLE_EFP2	0x40
@@ -211,26 +197,6 @@ struct bdb_general_features {
 #define DEVICE_TYPE_eDP			0x78C6
 #define DEVICE_TYPE_MIPI		0x7cc2
 
-#define DEVICE_CFG_NONE		0x00
-#define DEVICE_CFG_12BIT_DVOB	0x01
-#define DEVICE_CFG_12BIT_DVOC	0x02
-#define DEVICE_CFG_24BIT_DVOBC	0x09
-#define DEVICE_CFG_24BIT_DVOCB	0x0a
-#define DEVICE_CFG_DUAL_DVOB	0x11
-#define DEVICE_CFG_DUAL_DVOC	0x12
-#define DEVICE_CFG_DUAL_DVOBC	0x13
-#define DEVICE_CFG_DUAL_LINK_DVOBC 0x19
-#define DEVICE_CFG_DUAL_LINK_DVOCB 0x1a
-
-#define DEVICE_WIRE_NONE 	0x00
-#define DEVICE_WIRE_DVOB	0x01
-#define DEVICE_WIRE_DVOC	0x02
-#define DEVICE_WIRE_DVOBC	0x03
-#define DEVICE_WIRE_DVOBB	0x05
-#define DEVICE_WIRE_DVOCC	0x06
-#define DEVICE_WIRE_DVOB_MASTER	0x0d
-#define DEVICE_WIRE_DVOC_MASTER	0x0e
-
 #define DEVICE_PORT_DVOA	0x00	/* none on 845+ */
 #define DEVICE_PORT_DVOB	0x01
 #define DEVICE_PORT_DVOC	0x02
@@ -243,11 +209,6 @@ struct bdb_general_features {
 #define DEVICE_PORT_DPC		8
 #define DEVICE_PORT_DPD		9
 
-#define DEVICE_INFO_NONE	0
-#define DEVICE_INFO_HDMI_CERT	1
-#define DEVICE_INFO_DP		2
-#define DEVICE_INFO_DVI		3
-
 struct child_device_config {
 	uint16_t handle;
 	uint16_t device_type;	/* See DEVICE_TYPE_* above */
@@ -370,16 +331,6 @@ struct bdb_lvds_options {
 	uint8_t rsvd4;
 } __attribute__ ((packed));
 
-/* 915+ only */
-struct bdb_tv_features {
-	/* need to verify bit ordering */
-	uint16_t under_over_scan_via_yprpb:2;
-	uint16_t rsvd1:10;
-	uint16_t under_over_scan_via_dvi:2;
-	uint16_t add_overscan_mode:1;
-	uint16_t rsvd2:1;
-} __attribute__ ((packed));
-
 struct lvds_fp_timing {
 	uint16_t x_res;
 	uint16_t y_res;
@@ -476,79 +427,6 @@ struct bdb_lvds_lfp_data {
 	struct bdb_lvds_lfp_data_entry data[16];
 } __attribute__ ((packed));
 
-#define BACKLIGHT_TYPE_NONE 0
-#define BACKLIGHT_TYPE_I2C 1
-#define BACKLIGHT_TYPE_PWM 2
-
-#define BACKLIGHT_GMBUS_100KHZ	0
-#define BACKLIGHT_GMBUS_50KHZ	1
-#define BACKLIGHT_GMBUS_400KHZ	2
-#define BACKLIGHT_GMBUS_1MHZ	3
-
-struct backlight_info {
-	uint8_t inverter_type:2;	/* see BACKLIGHT_TYPE_* above */
-	uint8_t inverter_polarity:1;	/* 1 means 0 is max, 255 is min */
-	uint8_t gpio_pins:3;	/* see GPIO_PIN_* above */
-	uint8_t gmbus_speed:2;
-	uint16_t pwm_frequency;	/* in Hz */
-	uint8_t min_brightness;
-	/* Next two are only for 915+ systems */
-	uint8_t i2c_addr;
-	uint8_t i2c_cmd;
-} __attribute((packed));
-
-struct bdb_backlight_control {
-	uint8_t row_size;
-	struct backlight_info lfps[16];
-} __attribute__ ((packed));
-
-struct bdb_bia {
-	uint8_t bia_enable:1;
-	uint8_t bia_level:3;
-	uint8_t rsvd1:3;
-	uint8_t als_enable:1;
-	uint8_t als_response_data[20];
-} __attribute((packed));
-
-struct aimdb_header {
-	char signature[16];
-	char oem_device[20];
-	uint16_t aimdb_version;
-	uint16_t aimdb_header_size;
-	uint16_t aimdb_size;
-} __attribute__ ((packed));
-
-struct aimdb_block {
-	uint8_t aimdb_id;
-	uint16_t aimdb_size;
-} __attribute__ ((packed));
-
-struct vch_panel_data {
-	uint16_t fp_timing_offset;
-	uint8_t fp_timing_size;
-	uint16_t dvo_timing_offset;
-	uint8_t dvo_timing_size;
-	uint16_t text_fitting_offset;
-	uint8_t text_fitting_size;
-	uint16_t graphics_fitting_offset;
-	uint8_t graphics_fitting_size;
-} __attribute__ ((packed));
-
-struct vch_bdb_22 {
-	struct aimdb_block aimdb_block;
-	struct vch_panel_data panels[16];
-} __attribute__ ((packed));
-
-#define BLC_INVERTER_TYPE_NONE 0
-#define BLC_INVERTER_TYPE_I2C 1
-#define BLC_INVERTER_TYPE_PWM 2
-
-#define BLC_GPIO_NONE 0
-#define BLC_GPIO_I2C 1
-#define BLC_GPIO_CRT_DDC 2
-#define BLC_GPIO_DVI_DDC 3
-#define BLC_GPIO_SDVO_I2C 5
-
 struct blc_struct {
 	uint8_t inverter_type:2;
 	uint8_t inverter_polarity:1;	/* 1 means inverted (0 = max brightness) */
@@ -565,18 +443,6 @@ struct bdb_lvds_backlight {
 	struct blc_struct panels[16];
 } __attribute__ ((packed));
 
-struct bdb_lvds_power {
-	uint8_t dpst_enabled:1;
-	uint8_t pwr_prefs:3;
-	uint8_t rsvd1:3;
-	uint8_t als_enabled:1;
-	uint16_t als_backlight1;
-	uint16_t als_backlight2;
-	uint16_t als_backlight3;
-	uint16_t als_backlight4;
-	uint16_t als_backlight5;
-} __attribute__ ((packed));
-
 #define BDB_DRIVER_NO_LVDS	0
 #define BDB_DRIVER_INT_LVDS	1
 #define BDB_DRIVER_SDVO_LVDS	2
@@ -871,138 +737,4 @@ enum mipi_seq_element {
 	MIPI_SEQ_ELEM_MAX
 };
 
-/*
- * Driver<->VBIOS interaction occurs through scratch bits in
- * GR18 & SWF*.
- *
- * The VBIOS/firmware will signal to the gfx driver through the ASLE interrupt
- * (visible in the interupt regs at bit 0) when it wants something done.
- *
- * Pre-965:
- * The gfx driver can make calls to the VBIOS/firmware through an SMI request,
- * generated by writing to offset 0xe0 of the device's config space (see the
- * publically available 915 PRM for details).
- *
- * 965 and above:
- * IGD OpRegion requests to the VBIOS/firmware are made using SWSCI, which can
- * be triggered by writing to offset 0xe4 (see the publically available
- * 965 graphics PRM for details).
- */
-
-/* GR18 bits are set on display switch and hotkey events */
-#define GR18_DRIVER_SWITCH_EN	(1<<7)	/* 0: VBIOS control, 1: driver control */
-#define GR18_HOTKEY_MASK	0x78	/* See also SWF4 15:0 */
-#define   GR18_HK_NONE		(0x0<<3)
-#define   GR18_HK_LFP_STRETCH	(0x1<<3)
-#define   GR18_HK_TOGGLE_DISP	(0x2<<3)
-#define   GR18_HK_DISP_SWITCH	(0x4<<3)	/* see SWF14 15:0 for what to enable */
-#define   GR18_HK_POPUP_DISABLED (0x6<<3)
-#define   GR18_HK_POPUP_ENABLED	(0x7<<3)
-#define   GR18_HK_PFIT		(0x8<<3)
-#define   GR18_HK_APM_CHANGE	(0xa<<3)
-#define   GR18_HK_MULTIPLE	(0xc<<3)
-#define GR18_USER_INT_EN	(1<<2)
-#define GR18_A0000_FLUSH_EN	(1<<1)
-#define GR18_SMM_EN		(1<<0)
-
-/* Set by driver, cleared by VBIOS */
-#define SWF00_YRES_SHIFT	16
-#define SWF00_XRES_SHIFT	0
-#define SWF00_RES_MASK		0xffff
-
-/* Set by VBIOS at boot time and driver at runtime */
-#define SWF01_TV2_FORMAT_SHIFT	8
-#define SWF01_TV1_FORMAT_SHIFT	0
-#define SWF01_TV_FORMAT_MASK	0xffff
-
-#define SWF10_VBIOS_BLC_I2C_EN	(1<<29)
-#define SWF10_GTT_OVERRIDE_EN	(1<<28)
-#define SWF10_LFP_DPMS_OVR	(1<<27)	/* override DPMS on display switch */
-#define SWF10_ACTIVE_TOGGLE_LIST_MASK (7<<24)
-#define   SWF10_OLD_TOGGLE	0x0
-#define   SWF10_TOGGLE_LIST_1	0x1
-#define   SWF10_TOGGLE_LIST_2	0x2
-#define   SWF10_TOGGLE_LIST_3	0x3
-#define   SWF10_TOGGLE_LIST_4	0x4
-#define SWF10_PANNING_EN	(1<<23)
-#define SWF10_DRIVER_LOADED	(1<<22)
-#define SWF10_EXTENDED_DESKTOP	(1<<21)
-#define SWF10_EXCLUSIVE_MODE	(1<<20)
-#define SWF10_OVERLAY_EN	(1<<19)
-#define SWF10_PLANEB_HOLDOFF	(1<<18)
-#define SWF10_PLANEA_HOLDOFF	(1<<17)
-#define SWF10_VGA_HOLDOFF	(1<<16)
-#define SWF10_ACTIVE_DISP_MASK	0xffff
-#define   SWF10_PIPEB_LFP2	(1<<15)
-#define   SWF10_PIPEB_EFP2	(1<<14)
-#define   SWF10_PIPEB_TV2	(1<<13)
-#define   SWF10_PIPEB_CRT2	(1<<12)
-#define   SWF10_PIPEB_LFP	(1<<11)
-#define   SWF10_PIPEB_EFP	(1<<10)
-#define   SWF10_PIPEB_TV	(1<<9)
-#define   SWF10_PIPEB_CRT	(1<<8)
-#define   SWF10_PIPEA_LFP2	(1<<7)
-#define   SWF10_PIPEA_EFP2	(1<<6)
-#define   SWF10_PIPEA_TV2	(1<<5)
-#define   SWF10_PIPEA_CRT2	(1<<4)
-#define   SWF10_PIPEA_LFP	(1<<3)
-#define   SWF10_PIPEA_EFP	(1<<2)
-#define   SWF10_PIPEA_TV	(1<<1)
-#define   SWF10_PIPEA_CRT	(1<<0)
-
-#define SWF11_MEMORY_SIZE_SHIFT	16
-#define SWF11_SV_TEST_EN	(1<<15)
-#define SWF11_IS_AGP		(1<<14)
-#define SWF11_DISPLAY_HOLDOFF	(1<<13)
-#define SWF11_DPMS_REDUCED	(1<<12)
-#define SWF11_IS_VBE_MODE	(1<<11)
-#define SWF11_PIPEB_ACCESS	(1<<10)	/* 0 here means pipe a */
-#define SWF11_DPMS_MASK		0x07
-#define   SWF11_DPMS_OFF	(1<<2)
-#define   SWF11_DPMS_SUSPEND	(1<<1)
-#define   SWF11_DPMS_STANDBY	(1<<0)
-#define   SWF11_DPMS_ON		0
-
-#define SWF14_GFX_PFIT_EN	(1<<31)
-#define SWF14_TEXT_PFIT_EN	(1<<30)
-#define SWF14_LID_SWITCH_EN	(1<<29)
-#define SWF14_POPUP_EN		(1<<28)
-#define SWF14_DISPLAY_HOLDOFF	(1<<27)
-#define SWF14_DISP_DETECT_EN	(1<<26)
-#define SWF14_DOCKING_STATUS_DOCKED (1<<25)	/* 0 here means undocked */
-#define SWF14_DRIVER_STATUS	(1<<24)
-#define SWF14_OS_TYPE_WIN9X	(1<<23)
-#define SWF14_OS_TYPE_WINNT	(1<<22)
-/* 21:19 rsvd */
-#define SWF14_PM_TYPE_MASK	0x00070000
-#define   SWF14_PM_ACPI_VIDEO	(0x4 << 16)
-#define   SWF14_PM_ACPI		(0x3 << 16)
-#define   SWF14_PM_APM_12	(0x2 << 16)
-#define   SWF14_PM_APM_11	(0x1 << 16)
-#define SWF14_HK_REQUEST_MASK	0x0000ffff	/* see GR18 6:3 for event type */
-	  /* if GR18 indicates a display switch */
-#define   SWF14_DS_PIPEB_LFP2_EN (1<<15)
-#define   SWF14_DS_PIPEB_EFP2_EN (1<<14)
-#define   SWF14_DS_PIPEB_TV2_EN  (1<<13)
-#define   SWF14_DS_PIPEB_CRT2_EN (1<<12)
-#define   SWF14_DS_PIPEB_LFP_EN  (1<<11)
-#define   SWF14_DS_PIPEB_EFP_EN  (1<<10)
-#define   SWF14_DS_PIPEB_TV_EN   (1<<9)
-#define   SWF14_DS_PIPEB_CRT_EN  (1<<8)
-#define   SWF14_DS_PIPEA_LFP2_EN (1<<7)
-#define   SWF14_DS_PIPEA_EFP2_EN (1<<6)
-#define   SWF14_DS_PIPEA_TV2_EN  (1<<5)
-#define   SWF14_DS_PIPEA_CRT2_EN (1<<4)
-#define   SWF14_DS_PIPEA_LFP_EN  (1<<3)
-#define   SWF14_DS_PIPEA_EFP_EN  (1<<2)
-#define   SWF14_DS_PIPEA_TV_EN   (1<<1)
-#define   SWF14_DS_PIPEA_CRT_EN  (1<<0)
-	  /* if GR18 indicates a panel fitting request */
-#define   SWF14_PFIT_EN		(1<<0)	/* 0 means disable */
-	  /* if GR18 indicates an APM change request */
-#define   SWF14_APM_HIBERNATE	0x4
-#define   SWF14_APM_SUSPEND	0x3
-#define   SWF14_APM_STANDBY	0x1
-#define   SWF14_APM_RESTORE	0x0
-
 #endif /* _INTEL_BIOS_H_ */