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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2012-03-19 14:24:22 +0000 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2012-03-19 14:24:22 +0000 |
| commit | bf6c480d6ddc157713f839af314ea4892bf8f867 (patch) | |
| tree | 3c044d159236869587347aae2f358f832169cd48 /tools/intel_error_decode.c | |
| parent | d364c280892af29956ad7032b0d242b7d24d7846 (diff) | |
decode: Use the correct start mask for gen3 fence registers
A cut'n'paste error from gen2 apparently.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'tools/intel_error_decode.c')
| -rw-r--r-- | tools/intel_error_decode.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tools/intel_error_decode.c b/tools/intel_error_decode.c index a3b7ab59..ee0a270d 100644 --- a/tools/intel_error_decode.c +++ b/tools/intel_error_decode.c @@ -244,7 +244,7 @@ print_i915_fence(unsigned int devid, uint64_t fence) fence & 1 ? "" : "in", fence & 12 ? 'y' : 'x', (1<<((fence>>4)&0xf))*tile_width, - (uint32_t)fence & 0x7f80000, + (uint32_t)fence & 0xff00000, 1<<(20 + ((fence>>8)&0xf))); } |